Searched refs:SRST_CORE0 (Results 1 - 14 of 14) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Drk3036-cru.h100 #define SRST_CORE0 0 macro
H A Drk3228-cru.h156 #define SRST_CORE0 4 macro
H A Drk3128-cru.h156 #define SRST_CORE0 4 macro
H A Drk3188-cru-common.h139 #define SRST_CORE0 3 macro
H A Dpx30-cru.h203 #define SRST_CORE0 4 macro
H A Drk3328-cru.h211 #define SRST_CORE0 4 macro
H A Drk3308-cru.h224 #define SRST_CORE0 4 macro
H A Drk3288-cru.h201 #define SRST_CORE0 0 macro
H A Drockchip,rv1126-cru.h396 #define SRST_CORE0 4 macro
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi29 resets = <&cru SRST_CORE0>;
H A Drk3036.dtsi44 resets = <&cru SRST_CORE0>;
H A Drk3128.dtsi53 resets = <&cru SRST_CORE0>;
H A Drk322x.dtsi36 resets = <&cru SRST_CORE0>;
H A Drk3288.dtsi70 resets = <&cru SRST_CORE0>;

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