| History log of /src/sys/arch/arm/include/arm32/pte.h |
| Revision | | Date | Author | Comments |
| 1.23 |
| 04-May-2020 |
joerg | Prevent double definition of pt_entry_t from machine/param.h
|
| 1.22 |
| 02-Feb-2020 |
skrll | G/C L1_TABLE_SIZE_REAL
|
| 1.21 |
| 18-Jan-2020 |
skrll | Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) by
creating a new pool l1ttpl for the userland L1 translation table which
needs to be 8KB and 8KB aligned.
Limit the pool to maxproc and add hooks to allow the sysctl changing of
maxproc to adjust the pool.
This comes at a 5% performance penalty for build.sh -j8 kernel on a
Tegra TK1.
|
| 1.20 |
| 19-Jun-2019 |
skrll | branches: 1.20.4;
Whitespace
|
| 1.19 |
| 29-Oct-2014 |
skrll | branches: 1.19.20;
Update a comment to reflect ARM ARMv7
|
| 1.18 |
| 08-Aug-2014 |
skrll | Comment whitespace.
|
| 1.17 |
| 08-Aug-2014 |
skrll | Spell user with an e.
|
| 1.16 |
| 31-Jul-2014 |
skrll | Trailing whitespace
|
| 1.15 |
| 26-Feb-2014 |
matt | branches: 1.15.2;
Add XN bit L2 large pages.
|
| 1.14 |
| 22-Feb-2014 |
matt | Add L1_TABLE_SIZE_REAL
|
| 1.13 |
| 11-Sep-2012 |
matt | branches: 1.13.2; 1.13.4;
Fix the CACHE_MASKs for armv6 to include TEX and S bits.
Fix a comment in pte.h
|
| 1.12 |
| 20-Aug-2012 |
matt | Add support for mapping SuperSection on armv6 and armv7. These always
a domain of 0 so move the kernel from domain 15 to domain 0.
|
| 1.11 |
| 16-Aug-2012 |
matt | Add L2_S_SEGSIZE which is the number of bytes that a L2 page table will map.
|
| 1.10 |
| 10-Mar-2011 |
bsh | branches: 1.10.4; 1.10.10; 1.10.12;
Preliminary ARM11 MPCore support.
I have confirmed this commit doesn't affect existing evbarm kernels by
comparing binaries.
|
| 1.9 |
| 16-Jun-2010 |
jmcneill | branches: 1.9.2;
PR port-arm/43299: Support added for igepv2/cortexa8/omap3530
Apply patch from PR, with build fixes. ok skrll, matt
|
| 1.8 |
| 27-Apr-2008 |
matt | branches: 1.8.18; 1.8.20; 1.8.22;
Merge kernel changes in matt-armv6 to HEAD.
|
| 1.7 |
| 21-May-2003 |
thorpej | branches: 1.7.82; 1.7.106; 1.7.108; 1.7.110;
Remove #ifdefs supporting the old pmap, switching fully to the new.
|
| 1.6 |
| 18-Apr-2003 |
scw | Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems.
Some features of the new pmap are:
- It allows L1 descriptor tables to be shared efficiently between
multiple processes. A typical "maxusers 32" kernel, where NPROC is set
to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily
with just 4 L1s. This completely solves the problem of running out
of contiguous physical memory for allocating new L1s at runtime on a
busy system.
- Much improved cache/TLB management "smarts". This change ripples
out to encompass the low-level context switch code, which is also
much smarter about when to flush the cache/TLB, and when not to.
- Faster allocation of L2 page tables and associated metadata thanks,
in part, to the pool_cache enhancements recently contributed to
NetBSD by Wasabi Systems.
- Faster VM space teardown due to accurate referenced tracking of L2
page tables.
- Better/faster cache-alias tracking.
The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel
config file, and making the necessary changes to the port-specific
initarm() function. Several ports have already been converted and will
be committed shortly.
|
| 1.5 |
| 05-Apr-2002 |
thorpej | * Rewrite the 32-bit ARM pte.h based on the ARM architecture manual.
Significant cleanup, here, including better PTE bit names.
* Add XScale PTE extensions (ECC enable, write-allocate cache mode).
* Mechanical changes everywhere else to update for new pte.h. While
doing this, two bugs (as a result of typos) were fixed in
arm/arm32/bus_dma.c
evbarm/integrator/int_bus_dma.c
|
| 1.4 |
| 04-Apr-2002 |
thorpej | Rename flags that are really part of the pv_entry/mdpage into
pmap.h and give them more descriptive names and better comments:
* PT_M -> PVF_MOD (page is modified)
* PT_H -> PVF_REF (page is referenced)
* PT_W -> PVF_WIRED (mapping is wired)
* PT_Wr -> PVF_WRITE (mapping is writable)
* PT_NC -> PVF_NC (mapping is non-cacheable; multiple mappings)
|
| 1.3 |
| 03-Apr-2002 |
reinoud | In analogy to L2_LPAGE_SIZE add L2_SPAGE_SIZE ....
|
| 1.2 |
| 02-Mar-2002 |
chris | Update the types, pt_entry and pd_entry should be unsigned, and fixed at 32 bits.
|
| 1.1 |
| 23-Nov-2001 |
thorpej | branches: 1.1.2; 1.1.4;
- Move more contents of various <machine/vmparam.h> files into
<arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap
implementation).
- Since the MMU definitions in pte.h are specific to ARM processors
that support 32-bit mode, move pte.h to <arm/arm32/pte.h>.
- Make the Netwinder startup file build again (use PT_B|PT_C, rather
than PT_CACHEABLE, since the latter expands to a variable these days).
|
| 1.1.4.4 |
| 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.1.4.3 |
| 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.1.4.2 |
| 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.1.4.1 |
| 23-Nov-2001 |
thorpej | file pte.h was added on branch kqueue on 2002-01-10 19:37:56 +0000
|
| 1.1.2.4 |
| 17-Apr-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.3 |
| 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.1.2.2 |
| 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.1.2.1 |
| 23-Nov-2001 |
nathanw | file pte.h was added on branch nathanw_sa on 2002-01-08 00:23:12 +0000
|
| 1.7.110.2 |
| 11-Aug-2010 |
yamt | sync with head.
|
| 1.7.110.1 |
| 16-May-2008 |
yamt | sync with head.
|
| 1.7.108.1 |
| 18-May-2008 |
yamt | sync with head.
|
| 1.7.106.1 |
| 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.7.82.2 |
| 09-Nov-2007 |
matt | Make all the evbarm kernels build again. Fix lossage from rebase.
|
| 1.7.82.1 |
| 28-Aug-2007 |
matt | Add ArmV6 pte/pde extensions.
|
| 1.8.22.2 |
| 21-Apr-2011 |
rmind | sync with head
|
| 1.8.22.1 |
| 03-Jul-2010 |
rmind | sync with head
|
| 1.8.20.1 |
| 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.8.18.1 |
| 15-Feb-2014 |
matt | Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.
|
| 1.9.2.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.10.12.1 |
| 28-Nov-2012 |
matt | Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.
|
| 1.10.10.1 |
| 08-Feb-2013 |
riz | sys/arch/arm/include/arm32/pte.h 1.11
sys/arch/evbarm/marvell/marvell_machdep.c 1.19 via patch
Switch to ARM_VECTORS_HIGH for Sheeva CPU.
[msaitoh, ticket #785]
|
| 1.10.4.2 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.10.4.1 |
| 30-Oct-2012 |
yamt | sync with head
|
| 1.13.4.1 |
| 18-May-2014 |
rmind | sync with head
|
| 1.13.2.2 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.13.2.1 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.15.2.1 |
| 10-Aug-2014 |
tls | Rebase.
|
| 1.19.20.2 |
| 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.19.20.1 |
| 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.20.4.2 |
| 29-Feb-2020 |
ad | Sync with head.
|
| 1.20.4.1 |
| 25-Jan-2020 |
ad | Sync with head.
|
