Cross Reference: /src/sys/dev/acpi/qcomgpio.c

History log of /src/sys/dev/acpi/qcomgpio.c
Revision	Date	Author	Comments
1.8	17-Dec-2024	riastradh	qcomgpio(4): KNF whitespace No functional change intended.
1.7	17-Dec-2024	riastradh	qcomgpio(4): Sort includes. No functional change intended.
1.6	12-Dec-2024	jmcneill	qcomgpio: Add event counters for individual interrupt pins. arm64$ vmstat -i \| grep qcomgpio qcomgpio0 pin 126 1 0 qcomgpio0 pin 3 1 0
1.5	12-Dec-2024	jmcneill	qcomgpio: Filter some interrupts. Virtual pin 0x140 activates a previously unused block of AML code that triggers when the lid switch event is triggered. Execution if the AML spins the CPU and the interrupt status is not cleared due to a missing driver in the OS. Until that driver is added, filter this virtual pin on X1E platforms.
1.4	12-Dec-2024	jmcneill	qcomgpio: Translate virtual GPIO numbers using ACPI table data. The scheme used by this device node appears to follow the following conventions for mapping ACPI virtual pin numbers to hardware pin numbers: 1) If the virtual pin number is < the number of hardware pin numbers, it represents a hardware pin number. 2) If the virtual pin number is greater than this, divide it by 64. This gives us an index into the Interrupt resources returned by _CRS. The IRQ number in this resource can be used to lookup the hardware pin number in the _DSM PDC method call "CIPR". As an added bonus, use the _DSM GPIO method call to return the number of pins instead of hard-coding it for X1E.
1.3	11-Dec-2024	jmcneill	qcomgpio: Add reserved pin list and add one more ACPI pin mapping
1.2	09-Dec-2024	jmcneill	acpi: gpio: Pass the full ACPI_RESOURCE_GPIO to the translate callback.
1.1	08-Dec-2024	jmcneill	Add support for Snapdragon X Elite GPIO and I2C controllers.

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