Searched refs:CLK_TOP_APLL1 (Results 1 - 11 of 11) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8516-clk.h67 #define CLK_TOP_APLL1 33 macro
H A Dmt6765-clk.h78 #define CLK_TOP_APLL1 41 macro
H A Dmt8173-clk.h37 #define CLK_TOP_APLL1 25 macro
H A Dmediatek,mt6795-clk.h38 #define CLK_TOP_APLL1 25 macro
H A Dmt2712-clk.h76 #define CLK_TOP_APLL1 43 macro
H A Dmt8192-clk.h115 #define CLK_TOP_APLL1 101 macro
H A Dmediatek,mt8365-clk.h56 #define CLK_TOP_APLL1 44 macro
H A Dmediatek,mt8188-clk.h85 #define CLK_TOP_APLL1 72 macro
H A Dmt8195-clk.h106 #define CLK_TOP_APLL1 92 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi888 assigned-clock-parents = <&topckgen CLK_TOP_APLL1>,
H A Dmt8192.dtsi1011 <&topckgen CLK_TOP_APLL1>,

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