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  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
exynos5410.h 40 #define CLK_UART2 259
actions,s500-cmu.h 62 #define CLK_UART2 40
actions,s700-cmu.h 62 #define CLK_UART2 38
actions,s900-cmu.h 89 #define CLK_UART2 69
exynos5250.h 96 #define CLK_UART2 291
sophgo,cv1800.h 94 #define CLK_UART2 81
s5pv210.h 161 #define CLK_UART2 141
exynos3250.h 230 #define CLK_UART2 222
exynos4.h 154 #define CLK_UART2 314
exynos5420.h 70 #define CLK_UART2 259
sprd,sc9860-clk.h 89 #define CLK_UART2 4
  /src/sys/arch/arm/nxp/
imx8mq_ccm.h 184 #define CLK_UART2 149
imx8mq_ccm.c 137 IMX_COMPOSITE(CLK_UART2, "uart2", uart_p, 0xaf80, 0),
  /src/sys/arch/mips/ingenic/
apbus.c 78 { "com", JZ_UART2, 49, CLK_UART2, 0, 0},
ingenic_regs.h 171 #define CLK_UART2 (1 << 17)
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/sprd/
whale2.dtsi 102 <&ap_clk CLK_UART2>, <&ext_26m>;
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/actions/
s700.dtsi 135 clocks = <&cmu CLK_UART2>;
s900.dtsi 141 clocks = <&cmu CLK_UART2>;
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
s5pv210.dtsi 347 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
exynos5410.dtsi 358 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
owl-s500.dtsi 152 clocks = <&cmu CLK_UART2>;
exynos3250.dtsi 536 clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
exynos4.dtsi 475 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
exynos5250.dtsi 1219 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
  /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/sophgo/
cv18xx.dtsi 217 clocks = <&clk CLK_UART2>, <&clk CLK_APB_UART2>;

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