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    Searched refs:OSSSYS_BASE (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_navi10_reg_init.c 49 adev->reg_offset[OSSSYS_HWIP][i] = (const uint32_t *)(&(OSSSYS_BASE.instance[i]));
amdgpu_navi12_reg_init.c 49 adev->reg_offset[OSSSYS_HWIP][i] = (const uint32_t *)(&(OSSSYS_BASE.instance[i]));
amdgpu_navi14_reg_init.c 49 adev->reg_offset[OSSSYS_HWIP][i] = (const uint32_t *)(&(OSSSYS_BASE.instance[i]));
amdgpu_arct_reg_init.c 48 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i]));
amdgpu_vega10_reg_init.c 51 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i]));
amdgpu_vega20_reg_init.c 50 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i]));
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_ip_offset.h 105 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } },
vega20_ip_offset.h 107 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } },
navi12_ip_offset.h 139 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } },
navi14_ip_offset.h 139 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } },
renoir_ip_offset.h 179 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } },
vega10_ip_offset.h 165 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0, 0, 0, 0 } },
arct_ip_offset.h 121 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x00012500, 0x0040A000, 0, 0, 0 } },

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