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    Searched refs:SMUIO_BASE (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_navi10_reg_init.c 52 adev->reg_offset[SMUIO_HWIP][i] = (const uint32_t *)(&(SMUIO_BASE.instance[i]));
amdgpu_navi12_reg_init.c 52 adev->reg_offset[SMUIO_HWIP][i] = (const uint32_t *)(&(SMUIO_BASE.instance[i]));
amdgpu_navi14_reg_init.c 52 adev->reg_offset[SMUIO_HWIP][i] = (const uint32_t *)(&(SMUIO_BASE.instance[i]));
amdgpu_arct_reg_init.c 57 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));
amdgpu_vega10_reg_init.c 54 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));
amdgpu_vega20_reg_init.c 53 adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_ip_offset.h 117 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } },
vega20_ip_offset.h 125 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } },
navi12_ip_offset.h 160 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0x00440000, 0x02401000, 0 } },
navi14_ip_offset.h 160 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0x00440000, 0x02401000, 0 } },
renoir_ip_offset.h 200 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0x02401000, 0x00440000, 0 } },
vega10_ip_offset.h 195 static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0, 0, 0, 0 } },
arct_ip_offset.h 201 static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } },

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