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    Searched refs:THM_BASE (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_navi10_reg_init.c 53 adev->reg_offset[THM_HWIP][i] = (const uint32_t *)(&(THM_BASE.instance[i]));
amdgpu_navi12_reg_init.c 53 adev->reg_offset[THM_HWIP][i] = (const uint32_t *)(&(THM_BASE.instance[i]));
amdgpu_navi14_reg_init.c 53 adev->reg_offset[THM_HWIP][i] = (const uint32_t *)(&(THM_BASE.instance[i]));
amdgpu_arct_reg_init.c 58 adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i]));
amdgpu_vega10_reg_init.c 57 adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i]));
amdgpu_vega20_reg_init.c 55 adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i]));
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_ip_offset.h 123 static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0, 0, 0, 0, 0 } },
vega20_ip_offset.h 131 static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0, 0, 0, 0, 0 } },
navi12_ip_offset.h 167 static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0x02400C00, 0, 0, 0 } },
navi14_ip_offset.h 167 static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0x02400C00, 0, 0, 0 } },
renoir_ip_offset.h 207 static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0x02400C00, 0, 0, 0 } },
vega10_ip_offset.h 190 static const struct IP_BASE THM_BASE = { { { { 0x00016600, 0, 0, 0, 0 } },
arct_ip_offset.h 207 static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0, 0, 0, 0, 0 } },

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