Searched refs:base_addr (Results 1 - 24 of 24) sorted by relevance

/src/sys/arch/sun3/include/
H A Dmc68851.h106 int base_addr:28; /* Physical base address member in struct:mmu_long_dte_struct::__anon9dda0a6b030a::__anon9dda0a6b0408
168 long base_addr:24; /* Physical base address member in struct:mmu_long_pte_struct::__anon9dda0a6b070a::__anon9dda0a6b0808
197 long base_addr:28; member in struct:mmu_short_dte_struct::__anon9dda0a6b090a::__anon9dda0a6b0a08
235 long base_addr:24; member in struct:mmu_short_pte_struct::__anon9dda0a6b0b0a::__anon9dda0a6b0c08
/src/sys/compat/linux32/common/
H A Dlinux32_sockio.h37 unsigned short base_addr; member in struct:linux32_ifmap
/src/sys/dev/pci/cxgb/
H A Dcxgb_ctl_defs.h144 unsigned long long base_addr; member in struct:rdma_cq_setup
155 unsigned long long base_addr; member in struct:rdma_ctrlqp_setup
H A Dcxgb_t3_hw.c1899 * @base_addr: base address of queue
1910 enum sge_context_type type, int respq, u64 base_addr,
1916 if (base_addr & 0xfff) /* must be 4K aligned */
1921 base_addr >>= 12;
1925 V_EC_BASE_LO((u32)base_addr & 0xffff));
1926 base_addr >>= 16;
1927 t3_write_reg(adapter, A_SG_CONTEXT_DATA2, (u32)base_addr);
1928 base_addr >>= 32;
1930 V_EC_BASE_HI((u32)base_addr & 0xf) | V_EC_RESPQ(respq) |
1941 * @base_addr
1909 t3_sge_init_ecntxt(adapter_t * adapter,unsigned int id,int gts_enable,enum sge_context_type type,int respq,u64 base_addr,unsigned int size,unsigned int token,int gen,unsigned int cidx) argument
1952 t3_sge_init_flcntxt(adapter_t * adapter,unsigned int id,int gts_enable,u64 base_addr,unsigned int size,unsigned int bsize,unsigned int cong_thres,int gen,unsigned int cidx) argument
1991 t3_sge_init_rspcntxt(adapter_t * adapter,unsigned int id,int irq_vec_idx,u64 base_addr,unsigned int size,unsigned int fl_thres,int gen,unsigned int cidx) argument
2030 t3_sge_init_cqcntxt(adapter_t * adapter,unsigned int id,u64 base_addr,unsigned int size,int rspq,int ovfl_mode,unsigned int credits,unsigned int credit_thres) argument
3582 mc7_prep(adapter_t * adapter,struct mc7 * mc7,unsigned int base_addr,const char * name) argument
[all...]
H A Dcxgb_common.h740 enum sge_context_type type, int respq, u64 base_addr,
744 u64 base_addr, unsigned int size, unsigned int esize,
747 u64 base_addr, unsigned int size,
749 int t3_sge_init_cqcntxt(adapter_t *adapter, unsigned int id, u64 base_addr,
H A Dcxgb_offload.c323 ret = t3_sge_init_cqcntxt(adapter, req2->id, req2->base_addr,
341 req2->base_addr, req2->size,
/src/sys/arch/x86/x86/
H A Dlinux_trap.c67 unsigned int base_addr; member in struct:linux_user_desc
195 info.entry_number, info.base_addr, info.limit, info.seg_32bit,
205 return lwp_setprivate(l, (void *)(uintptr_t)info.base_addr);
/src/sys/arch/arm/ti/
H A Dti_div_clock.c103 bus_addr_t addr, base_addr; local in function:ti_div_clock_attach
107 fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) {
115 if (bus_space_map(sc->sc_bst, base_addr + addr, 4, 0, &sc->sc_bsh) != 0) {
H A Dti_gate_clock.c106 bus_addr_t addr, base_addr; local in function:ti_gate_clock_attach
111 fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) {
119 if (bus_space_map(sc->sc_bst, base_addr + addr, 4, 0, &sc->sc_bsh) != 0) {
H A Dti_mux_clock.c107 bus_addr_t addr, base_addr; local in function:ti_mux_clock_attach
112 fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) {
120 if (bus_space_map(sc->sc_bst, base_addr + addr, 4, 0, &sc->sc_bsh) != 0) {
H A Dti_dpll_clock.c181 bus_addr_t addr[NREG], base_addr; local in function:ti_dpll_clock_attach
185 if (fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) {
202 if (bus_space_map(sc->sc_bst, base_addr + addr[n], 4, 0, &sc->sc_bsh[n]) != 0) {
/src/sys/compat/linux/common/
H A Dlinux_sockio.h57 unsigned short base_addr; member in struct:linux_ifmap
/src/sys/dev/pci/
H A Dpciidereg.h107 u_int32_t base_addr; /* physical base addr of memory region */ member in struct:idedma_table
H A Dpiixpm.c446 uint16_t base_addr; local in function:piixpm_sb800_init
475 base_addr = (uint16_t)hi << 8;
485 base_addr = ((uint16_t)hi << 8) & SB800_PM_SMBUS0EN_BADDR;
495 sc->sc_sb800_mmio ? "memory" : "I/O", base_addr);
497 if (bus_space_map(sc->sc_iot, PCI_MAPREG_IO_ADDR(base_addr),
H A Dpciide_common.c776 dma_maps->dma_table[seg].base_addr = htole32(phys);
781 le32toh(dma_maps->dma_table[seg].base_addr)), DEBUG_DMA);
/src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/tests/
H A Dsanitizer_common_test.cc414 uptr base_addr = address_range.Init(init_size); local in function:__sanitizer::TEST
415 CHECK_NE(base_addr, (void*)-1);
416 CHECK_EQ(base_addr, address_range.Map(base_addr, init_size));
419 address_range.Unmap(base_addr, init_size);
422 base_addr = address_range.Init(init_size);
423 CHECK_EQ(base_addr, address_range.Map(base_addr, init_size));
429 address_range.Unmap(base_addr, PageSize);
439 EXPECT_DEATH(address_range.Unmap(base_addr
[all...]
/src/sys/dev/acpi/
H A Dqcomipcc.c100 bus_addr_t base_addr; local in function:qcipcc_attach
121 base_addr = acpi_compatible_lookup(aa, compat_data)->value;
125 if (bus_space_map(sc->sc_iot, base_addr, QCIPCC_SIZE,
H A Dqcomsmem.c109 uint32_t base_addr; member in struct:qcsmem_info
/src/libexec/ld.elf_so/
H A Dmap_object.c84 void *base_addr; local in function:_rtld_map_object
330 base_addr = NULL;
334 base_addr = (void *)(uintptr_t)base_vaddr;
338 mapbase = mmap(base_addr, mapsize, PROT_NONE, mapflags, -1, 0);
345 if (!obj->isdynamic && mapbase != base_addr) {
/src/sys/arch/riscv/starfive/
H A Djh7110_pcie.c457 uint64_t base_addr = 0; local in function:jh7110_pcie_host_init
461 SET4(sc, CONFIG_SPACE_ADDR_OFFSET + 0x10, BUS_ADDR_LO32(base_addr));
462 SET4(sc, CONFIG_SPACE_ADDR_OFFSET + 0x14, BUS_ADDR_HI32(base_addr));
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_df_v3_6.c712 uint64_t base_addr = 0; local in function:df_v3_6_get_dram_base_addr
724 base_addr = REG_GET_FIELD(base_addr_reg_val,
728 return base_addr << 28;
/src/sys/arch/alpha/alpha/
H A Ddec_kn300.c299 printf(fmt1, "Base Addr of PCI bridge", iodsnp->base_addr);
/src/sys/compat/linux/arch/i386/
H A Dlinux_machdep.c525 u_long base_addr; member in struct:linux_ldt_info
558 if (ldt_info.base_addr == 0 && ldt_info.limit == 0 &&
566 d.sd.sd_lobase = ldt_info.base_addr & 0xffffff;
567 d.sd.sd_hibase = (ldt_info.base_addr >> 24) & 0xff;
586 ldt_info.entry_number, ldt_info.base_addr, ldt_info.limit));
/src/sys/arch/alpha/pci/
H A Dmcpciareg.h272 uint64_t base_addr; member in struct:mcpcia_iodsnap

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