| /src/sys/arch/evbppc/virtex/ |
| dcr.c | 1 /* $NetBSD: dcr.c,v 1.4 2025/02/27 08:39:54 andvar Exp $ */
33 * DCR bus space size & base addresses are hardcoded and runtime-checked,
40 __KERNEL_RCSID(0, "$NetBSD: dcr.c,v 1.4 2025/02/27 08:39:54 andvar Exp $");
44 #include <evbppc/virtex/dcr.h>
|
| machdep.c | 76 #include <evbppc/virtex/dcr.h>
|
| design_gsrd1.c | 55 #include <evbppc/virtex/dcr.h>
97 * DCR bus space leaf access routines.
|
| design_gsrd2.c | 58 #include <evbppc/virtex/dcr.h>
95 * DCR bus space leaf access routines.
|
| /src/sys/arch/hpcsh/dev/ |
| j6x0lcd.c | 181 uint8_t dcr, ddr; local in function:j6x0lcd_attach
191 dcr = DAC_(CR);
192 dcr &= ~SH7709_DACR_DAE; /* want to control each channel separately */
193 dcr |= SH7709_DACR_DAOE0; /* enable channel 0 */
194 DAC_(CR) = dcr;
|
| /src/sys/arch/powerpc/booke/dev/ |
| pq3sdhc.c | 109 uint32_t dcr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, DCR); local in function:pq3sdhc_attach
110 dcr |= DCR_SNOOP | DCR_RD_SAFE | DCR_RD_PFE;
111 bus_space_write_4(sc->sc_bst, sc->sc_bsh, DCR, dcr);
|
| /src/sys/arch/evbppc/wii/dev/ |
| wiifb.c | 209 uint16_t dcr; local in function:wiifb_init
213 dcr = RD2(sc, VI_DCR);
214 if ((dcr & VI_DCR_ENB) != 0) {
215 sc->sc_format = __SHIFTOUT(dcr, VI_DCR_FMT);
216 sc->sc_interlaced = (dcr & VI_DCR_NIN) == 0;
228 dcr = __SHIFTIN(sc->sc_format, VI_DCR_FMT) |
230 WR2(sc, VI_DCR, dcr);
|
| /src/sys/arch/ia64/ia64/ |
| locore.S | 91 mov cr.dcr=r17
|
| /src/sys/arch/x68k/x68k/ |
| iodevice.h | 61 char pad0[2]; unsigned char dcr; member in struct:dmac
|
| /src/sys/arch/x68k/dev/ |
| intio_dmac.c | 165 uint8_t dcr, uint8_t ocr)
205 chan->ch_dcr = dcr;
573 printf("CSR=%02x, CER=%02x, DCR=%02x, OCR=%02x, SCR=%02x, "
|
| /src/sys/arch/ia64/include/ |
| ia64_cpu.h | 42 * Definition of DCR bits.
456 IA64_CR(dcr)
|
| /src/sys/arch/hp300/stand/common/ |
| scsireg.h | 358 u_char dcr : 1; /* disable correction */ member in struct:scsi_err_recovery
|
