Searched refs:BLENDFACTOR_ONE (Results 1 - 25 of 54) sorted by relevance

123

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_render.c106 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
108 {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
110 {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
112 {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
128 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
191 sblend = BLENDFACTOR_ONE;
H A Di830_3d.c145 SRC_BLND_FACT(BLENDFACTOR_ONE) |
H A Di830_reg.h295 #define BLENDFACTOR_ONE 0x02 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_render.c106 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
108 {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
110 {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
112 {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
128 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
191 sblend = BLENDFACTOR_ONE;
H A Di830_3d.c145 SRC_BLND_FACT(BLENDFACTOR_ONE) |
H A Di830_reg.h289 #define BLENDFACTOR_ONE 0x02 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_render.c104 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
106 {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
108 {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
110 {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
126 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
192 sblend = BLENDFACTOR_ONE;
H A Di830_3d.c151 SRC_BLND_FACT(BLENDFACTOR_ONE) |
H A Di830_reg.h225 #define BLENDFACTOR_ONE 0x02 macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/
H A Dswr_state.h272 return BLENDFACTOR_ONE;
311 return BLENDFACTOR_ONE;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/
H A Dswr_state.h295 return BLENDFACTOR_ONE;
334 return BLENDFACTOR_ONE;
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A DgenX_pipeline.c635 [VK_BLEND_FACTOR_ONE] = BLENDFACTOR_ONE,
1024 entry.SourceBlendFactor = BLENDFACTOR_ONE;
1025 entry.DestinationBlendFactor = BLENDFACTOR_ONE;
1029 entry.SourceAlphaBlendFactor = BLENDFACTOR_ONE;
1030 entry.DestinationAlphaBlendFactor = BLENDFACTOR_ONE;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.c65 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
67 {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
69 {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
71 {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
87 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
437 sblend = BLENDFACTOR_ONE;
510 ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACTOR_ONE) |
1116 BATCH(BLENDFACTOR_ONE << S8_SRC_BLEND_FACTOR_SHIFT |
1117 BLENDFACTOR_ONE << S8_DST_BLEND_FACTOR_SHIF
[all...]
H A Dgen8_render.c151 /* Src */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
152 /* Dst */ {0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
153 /* Over */ {1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
154 /* OverReverse */ {0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
162 /* Add */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
179 #define NO_BLEND BLEND_OFFSET(BLENDFACTOR_ONE, BLENDFACTOR_ZERO)
263 src = BLENDFACTOR_ONE;
1786 !(dst == BLENDFACTOR_ZERO && src == BLENDFACTOR_ONE);
H A Dgen2_render.h218 #define BLENDFACTOR_ONE 0x02 macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/core/core/
H A Dblend.h49 case BLENDFACTOR_ONE:
H A Dstate.h479 BLENDFACTOR_ONE, enumerator in enum:SWR_BLEND_FACTOR
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen8_render.c190 /* Src */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
191 /* Dst */ {0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
192 /* Over */ {1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
193 /* OverReverse */ {0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
201 /* Add */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
218 #define NO_BLEND BLEND_OFFSET(BLENDFACTOR_ONE, BLENDFACTOR_ZERO)
329 src = BLENDFACTOR_ONE;
1853 !(dst == BLENDFACTOR_ZERO && src == BLENDFACTOR_ONE);
H A Dgen9_render.c207 /* Src */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
208 /* Dst */ {0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
209 /* Over */ {1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
210 /* OverReverse */ {0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
218 /* Add */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
235 #define NO_BLEND BLEND_OFFSET(BLENDFACTOR_ONE, BLENDFACTOR_ZERO)
380 src = BLENDFACTOR_ONE;
1929 !(dst == BLENDFACTOR_ZERO && src == BLENDFACTOR_ONE);
H A Dgen2_render.c68 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
70 {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
72 {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
74 {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
90 {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
440 sblend = BLENDFACTOR_ONE;
513 ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACTOR_ONE) |
1135 BATCH(BLENDFACTOR_ONE << S8_SRC_BLEND_FACTOR_SHIFT |
1136 BLENDFACTOR_ONE << S8_DST_BLEND_FACTOR_SHIF
[all...]
H A Dgen2_render.h218 #define BLENDFACTOR_ONE 0x02 macro
H A Dgen8_render.h360 #define BLENDFACTOR_ONE 0x1 macro
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_pipeline.c892 [VK_BLEND_FACTOR_ONE] = BLENDFACTOR_ONE,
1355 entry.SourceBlendFactor = BLENDFACTOR_ONE;
1356 entry.DestinationBlendFactor = BLENDFACTOR_ONE;
1360 entry.SourceAlphaBlendFactor = BLENDFACTOR_ONE;
1361 entry.DestinationAlphaBlendFactor = BLENDFACTOR_ONE;
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h289 #define BLENDFACTOR_ONE 0x02 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h289 #define BLENDFACTOR_ONE 0x02 macro

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