Searched refs:_3DSTATE_MODES_2_CMD (Results 1 - 14 of 14) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_3d.c147 OUT_BATCH(_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(0) | /* always */
H A Di830_reg.h461 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_3d.c147 OUT_BATCH(_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(0) | /* always */
H A Di830_reg.h455 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_3d.c154 OUT_BATCH(_3DSTATE_MODES_2_CMD |
H A Di830_reg.h393 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h340 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
H A Di830_state.c995 i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h340 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
H A Di830_state.c995 i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.h384 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h455 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.h384 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h455 #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) macro

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