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    Searched refs:accel_state (Results 1 - 25 of 43) sorted by relevancy

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  /xsrc/external/mit/xf86-video-ati/dist/src/
radeon_exa_shared.c 58 struct radeon_accel_state *accel_state = info->accel_state; local
60 accel_state->vline_crtc = NULL;
61 accel_state->vline_y1 = -1;
62 accel_state->vline_y2 = 0;
68 struct radeon_accel_state *accel_state = info->accel_state; local
70 accel_state->vline_crtc = radeon_pick_best_crtc(pScrn, x1, x2, y1, y2);
71 if (accel_state->vline_y1 == -1)
72 accel_state->vline_y1 = y1
170 struct radeon_accel_state *accel_state = info->accel_state; local
185 struct radeon_accel_state *accel_state = info->accel_state; local
211 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
r600_exa.c 55 struct radeon_accel_state *accel_state = info->accel_state; local
62 memcpy(&accel_state->src_obj[0], src0, sizeof(struct r600_accel_object));
63 accel_state->src_size[0] = src0->pitch * src0->height * (src0->bpp/8);
66 accel_state->src_size[0] = src0->surface->bo_size;
71 if (accel_state->src_obj[0].pitch & pitch_align)
72 RADEON_FALLBACK(("Bad src pitch 0x%08x\n", accel_state->src_obj[0].pitch));
75 if (accel_state->src_obj[0].offset & base_align)
76 RADEON_FALLBACK(("Bad src offset 0x%08x\n", accel_state->src_obj[0].offset));
79 memset(&accel_state->src_obj[0], 0, sizeof(struct r600_accel_object))
173 struct radeon_accel_state *accel_state = info->accel_state; local
329 struct radeon_accel_state *accel_state = info->accel_state; local
345 struct radeon_accel_state *accel_state = info->accel_state; local
380 struct radeon_accel_state *accel_state = info->accel_state; local
525 struct radeon_accel_state *accel_state = info->accel_state; local
543 struct radeon_accel_state *accel_state = info->accel_state; local
574 struct radeon_accel_state *accel_state = info->accel_state; local
687 struct radeon_accel_state *accel_state = info->accel_state; local
708 struct radeon_accel_state *accel_state = info->accel_state; local
945 struct radeon_accel_state *accel_state = info->accel_state; local
1278 struct radeon_accel_state *accel_state = info->accel_state; local
1542 struct radeon_accel_state *accel_state = info->accel_state; local
1561 struct radeon_accel_state *accel_state = info->accel_state; local
1643 struct radeon_accel_state *accel_state = info->accel_state; local
1752 struct radeon_accel_state *accel_state = info->accel_state; local
1852 struct radeon_accel_state *accel_state = info->accel_state; local
1971 struct radeon_accel_state *accel_state = info->accel_state; local
2105 struct radeon_accel_state *accel_state = info->accel_state; local
2116 struct radeon_accel_state *accel_state = info->accel_state; local
2134 struct radeon_accel_state *accel_state = info->accel_state; local
2169 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
radeon_vbo.c 86 struct radeon_accel_state *accel_state = info->accel_state; local
88 accel_state->use_vbos = TRUE;
89 make_empty_list(&accel_state->bo_free);
90 make_empty_list(&accel_state->bo_wait);
91 make_empty_list(&accel_state->bo_reserved);
97 struct radeon_accel_state *accel_state = info->accel_state; local
100 foreach_s(dma_bo, temp, &accel_state->bo_free) {
106 foreach_s(dma_bo, temp, &accel_state->bo_wait)
122 struct radeon_accel_state *accel_state = info->accel_state; local
175 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
evergreen_exa.c 63 struct radeon_accel_state *accel_state = info->accel_state; local
92 accel_state->solid_vs_offset, accel_state->solid_ps_offset,
101 radeon_vbo_check(pScrn, &accel_state->vbo, 16);
102 radeon_vbo_check(pScrn, &accel_state->cbuf, 256);
107 evergreen_set_generic_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
108 evergreen_set_screen_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height)
219 struct radeon_accel_state *accel_state = info->accel_state; local
235 struct radeon_accel_state *accel_state = info->accel_state; local
268 struct radeon_accel_state *accel_state = info->accel_state; local
406 struct radeon_accel_state *accel_state = info->accel_state; local
424 struct radeon_accel_state *accel_state = info->accel_state; local
455 struct radeon_accel_state *accel_state = info->accel_state; local
544 struct radeon_accel_state *accel_state = info->accel_state; local
562 struct radeon_accel_state *accel_state = info->accel_state; local
791 struct radeon_accel_state *accel_state = info->accel_state; local
837 struct radeon_accel_state *accel_state = info->accel_state; local
1136 struct radeon_accel_state *accel_state = info->accel_state; local
1400 struct radeon_accel_state *accel_state = info->accel_state; local
1419 struct radeon_accel_state *accel_state = info->accel_state; local
1495 struct radeon_accel_state *accel_state = info->accel_state; local
1614 struct radeon_accel_state *accel_state = info->accel_state; local
1751 struct radeon_accel_state *accel_state = info->accel_state; local
1767 struct radeon_accel_state *accel_state = info->accel_state; local
1787 struct radeon_accel_state *accel_state = info->accel_state; local
1840 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
r600_textured_videofuncs.c 64 struct radeon_accel_state *accel_state = info->accel_state; local
203 accel_state->xv_vs_offset, accel_state->xv_ps_offset,
215 radeon_vbo_check(pScrn, &accel_state->vbo, 16);
218 r600_set_default_state(pScrn, accel_state->ib);
220 r600_set_generic_scissor(pScrn, accel_state->ib, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
221 r600_set_screen_scissor(pScrn, accel_state->ib, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height)
    [all...]
evergreen_textured_videofuncs.c 66 struct radeon_accel_state *accel_state = info->accel_state; local
183 accel_state->xv_vs_offset, accel_state->xv_ps_offset,
195 radeon_vbo_check(pScrn, &accel_state->vbo, 16);
196 radeon_vbo_check(pScrn, &accel_state->cbuf, 512);
201 evergreen_set_generic_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
202 evergreen_set_screen_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height)
    [all...]
radeon_accelfuncs.c 140 info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
147 OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
175 OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
194 info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
208 OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
239 OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
272 OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
301 info->accel_state->dashLen = length
    [all...]
radeon_exa_funcs.c 68 return ++info->accel_state->exaSyncMarker;
82 if (info->accel_state->exaMarkerSynced != marker) {
84 info->accel_state->exaMarkerSynced = marker;
87 RADEONPTR(pScrn)->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;
213 info->accel_state->dst_pix = pPix;
231 FUNC_NAME(RADEONFlush2D)(info->accel_state->dst_pix);
236 if (info->accel_state->vsync)
263 info->state_2d.dp_cntl = ((info->accel_state->xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) |
264 (info->accel_state->ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0));
320 info->accel_state->xdir = xdir
    [all...]
radeon_exa_render.c 296 info->accel_state->need_src_tile_x = info->accel_state->need_src_tile_y = FALSE;
297 info->accel_state->src_tile_width = info->accel_state->src_tile_height = 65536; /* "infinite" */
310 info->accel_state->need_src_tile_x = (w & (w - 1)) != 0 || badPitch;
311 info->accel_state->need_src_tile_y = (h & (h - 1)) != 0;
313 if ((info->accel_state->need_src_tile_x ||
314 info->accel_state->need_src_tile_y) &&
319 info->accel_state->need_src_tile_x =
320 info->accel_state->need_src_tile_y
2225 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
cayman_accel.c 56 struct radeon_accel_state *accel_state = info->accel_state; local
58 if (accel_state->XInited3D)
64 accel_state->XInited3D = TRUE;
93 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
98 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
103 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
258 fs_conf.bo = accel_state->shaders_bo;
radeon_render.c 271 info->accel_state->RenderTex = NULL;
279 if ((currentTime.milliseconds > info->accel_state->RenderTimeout) &&
280 info->accel_state->RenderTex) {
281 xf86FreeOffscreenLinear(info->accel_state->RenderTex);
282 info->accel_state->RenderTex = NULL;
285 if (!info->accel_state->RenderTex)
286 info->accel_state->RenderCallback = NULL;
297 info->accel_state->RenderTimeout = currentTime.milliseconds + 30000;
298 info->accel_state->RenderCallback = RenderCallback;
305 if (info->accel_state->RenderTex)
    [all...]
r6xx_accel.c 93 info->accel_state->vbo.vb_offset = 0;
94 info->accel_state->vbo.vb_start_op = -1;
574 struct radeon_accel_state *accel_state = info->accel_state; local
598 accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
603 accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
851 struct radeon_accel_state *accel_state = info->accel_state; local
1278 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
radeon_exa.c 154 if (pitch > 16320 || pitch % info->accel_state->exa->pixmapPitchAlign != 0)
157 if (offset % info->accel_state->exa->pixmapOffsetAlign != 0)
312 (info->accel_state->exa->flags & EXA_MIXED_PIXMAPS);
392 if (info->accel_state->exa->flags & EXA_MIXED_PIXMAPS) {
465 if (info->accel_state->exa->flags & EXA_MIXED_PIXMAPS) {
723 if (info->accel_state->exa != NULL) {
727 info->accel_state->exa = exaDriverAlloc();
728 if (info->accel_state->exa == NULL)
739 info->accel_state->exa->memoryBase = info->FB;
740 info->accel_state->exa->memorySize = info->FbMapSize - info->FbSecureSize
    [all...]
evergreen_accel.c 630 struct radeon_accel_state *accel_state = info->accel_state; local
667 accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
672 accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
972 struct radeon_accel_state *accel_state = info->accel_state; local
979 if (accel_state->XInited3D)
985 accel_state->XInited3D = TRUE
1454 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
radeon_kms.c 82 struct radeon_accel_state *accel_state = info->accel_state; local
89 if (info->accel_state->vbo.vb_offset && info->accel_state->vbo.vb_bo) {
90 radeon_vbo_put(pScrn, &info->accel_state->vbo);
91 info->accel_state->vbo.vb_start_op = -1;
95 if (info->accel_state->cbuf.vb_bo) {
96 radeon_vbo_put(pScrn, &info->accel_state->cbuf);
97 info->accel_state->cbuf.vb_start_op = -1;
103 if (accel_state->use_vbos
    [all...]
  /xsrc/external/mit/xf86-video-ati-kms/dist/src/
radeon_vbo.c 84 struct radeon_accel_state *accel_state = info->accel_state; local
86 accel_state->use_vbos = TRUE;
87 make_empty_list(&accel_state->bo_free);
88 make_empty_list(&accel_state->bo_wait);
89 make_empty_list(&accel_state->bo_reserved);
95 struct radeon_accel_state *accel_state = info->accel_state; local
98 foreach_s(dma_bo, temp, &accel_state->bo_free) {
104 foreach_s(dma_bo, temp, &accel_state->bo_wait)
120 struct radeon_accel_state *accel_state = info->accel_state; local
173 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
evergreen_exa.c 60 struct radeon_accel_state *accel_state = info->accel_state; local
88 accel_state->solid_vs_offset, accel_state->solid_ps_offset,
97 radeon_vbo_check(pScrn, &accel_state->vbo, 16);
98 radeon_vbo_check(pScrn, &accel_state->cbuf, 256);
103 evergreen_set_generic_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
104 evergreen_set_screen_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height)
216 struct radeon_accel_state *accel_state = info->accel_state; local
232 struct radeon_accel_state *accel_state = info->accel_state; local
265 struct radeon_accel_state *accel_state = info->accel_state; local
405 struct radeon_accel_state *accel_state = info->accel_state; local
423 struct radeon_accel_state *accel_state = info->accel_state; local
454 struct radeon_accel_state *accel_state = info->accel_state; local
544 struct radeon_accel_state *accel_state = info->accel_state; local
562 struct radeon_accel_state *accel_state = info->accel_state; local
805 struct radeon_accel_state *accel_state = info->accel_state; local
851 struct radeon_accel_state *accel_state = info->accel_state; local
1154 struct radeon_accel_state *accel_state = info->accel_state; local
1291 struct radeon_accel_state *accel_state = info->accel_state; local
1565 struct radeon_accel_state *accel_state = info->accel_state; local
1578 struct radeon_accel_state *accel_state = info->accel_state; local
1654 struct radeon_accel_state *accel_state = info->accel_state; local
1772 struct radeon_accel_state *accel_state = info->accel_state; local
1907 struct radeon_accel_state *accel_state = info->accel_state; local
1923 struct radeon_accel_state *accel_state = info->accel_state; local
1941 struct radeon_accel_state *accel_state = info->accel_state; local
1994 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
r600_exa.c 54 struct radeon_accel_state *accel_state = info->accel_state; local
59 memcpy(&accel_state->src_obj[0], src0, sizeof(struct r600_accel_object));
60 accel_state->src_size[0] = src0->pitch * src0->height * (src0->bpp/8);
62 accel_state->src_size[0] = src0->surface->bo_size;
65 if (accel_state->src_obj[0].pitch & pitch_align)
66 RADEON_FALLBACK(("Bad src pitch 0x%08x\n", accel_state->src_obj[0].pitch));
69 memset(&accel_state->src_obj[0], 0, sizeof(struct r600_accel_object));
70 accel_state->src_size[0] = 0;
74 memcpy(&accel_state->src_obj[1], src1, sizeof(struct r600_accel_object))
141 struct radeon_accel_state *accel_state = info->accel_state; local
285 struct radeon_accel_state *accel_state = info->accel_state; local
301 struct radeon_accel_state *accel_state = info->accel_state; local
334 struct radeon_accel_state *accel_state = info->accel_state; local
473 struct radeon_accel_state *accel_state = info->accel_state; local
491 struct radeon_accel_state *accel_state = info->accel_state; local
522 struct radeon_accel_state *accel_state = info->accel_state; local
608 struct radeon_accel_state *accel_state = info->accel_state; local
627 struct radeon_accel_state *accel_state = info->accel_state; local
865 struct radeon_accel_state *accel_state = info->accel_state; local
1198 struct radeon_accel_state *accel_state = info->accel_state; local
1335 struct radeon_accel_state *accel_state = info->accel_state; local
1589 struct radeon_accel_state *accel_state = info->accel_state; local
1602 struct radeon_accel_state *accel_state = info->accel_state; local
1681 struct radeon_accel_state *accel_state = info->accel_state; local
1802 struct radeon_accel_state *accel_state = info->accel_state; local
1933 struct radeon_accel_state *accel_state = info->accel_state; local
1944 struct radeon_accel_state *accel_state = info->accel_state; local
1956 struct radeon_accel_state *accel_state = info->accel_state; local
1974 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
radeon_exa_shared.c 54 struct radeon_accel_state *accel_state = info->accel_state; local
56 accel_state->vline_crtc = NULL;
57 accel_state->vline_y1 = -1;
58 accel_state->vline_y2 = 0;
64 struct radeon_accel_state *accel_state = info->accel_state; local
66 accel_state->vline_crtc =
68 if (accel_state->vline_y1 == -1)
69 accel_state->vline_y1 = y1
148 struct radeon_accel_state *accel_state = info->accel_state; local
164 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
evergreen_textured_videofuncs.c 64 struct radeon_accel_state *accel_state = info->accel_state; local
167 accel_state->xv_vs_offset, accel_state->xv_ps_offset,
179 radeon_vbo_check(pScrn, &accel_state->vbo, 16);
180 radeon_vbo_check(pScrn, &accel_state->cbuf, 512);
185 evergreen_set_generic_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
186 evergreen_set_screen_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height)
    [all...]
r600_textured_videofuncs.c 64 struct radeon_accel_state *accel_state = info->accel_state; local
179 accel_state->xv_vs_offset, accel_state->xv_ps_offset,
191 radeon_vbo_check(pScrn, &accel_state->vbo, 16);
196 r600_set_generic_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
197 r600_set_screen_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height);
198 r600_set_window_scissor(pScrn, 0, 0, accel_state->dst_obj.width, accel_state->dst_obj.height)
    [all...]
radeon_exa_render.c 265 info->accel_state->need_src_tile_x = info->accel_state->need_src_tile_y = FALSE;
266 info->accel_state->src_tile_width = info->accel_state->src_tile_height = 65536; /* "infinite" */
279 info->accel_state->need_src_tile_x = (w & (w - 1)) != 0 || badPitch;
280 info->accel_state->need_src_tile_y = (h & (h - 1)) != 0;
282 if ((info->accel_state->need_src_tile_x ||
283 info->accel_state->need_src_tile_y) &&
288 info->accel_state->need_src_tile_x =
289 info->accel_state->need_src_tile_y
2146 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]
radeon_exa_funcs.c 48 return ++info->accel_state->exaSyncMarker;
172 info->accel_state->dst_pix = pPix;
188 RADEONFlush2D(info->accel_state->dst_pix);
192 if (info->accel_state->vsync)
219 info->state_2d.dp_cntl = ((info->accel_state->xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) |
220 (info->accel_state->ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0));
274 info->accel_state->xdir = xdir;
275 info->accel_state->ydir = ydir;
276 info->accel_state->dst_pix = pDst;
295 RADEONFlush2D(info->accel_state->dst_pix)
    [all...]
cayman_accel.c 53 struct radeon_accel_state *accel_state = info->accel_state; local
55 if (accel_state->XInited3D)
61 accel_state->XInited3D = TRUE;
90 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
95 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
100 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
255 fs_conf.bo = accel_state->shaders_bo;
evergreen_accel.c 622 struct radeon_accel_state *accel_state = info->accel_state; local
659 accel_state->vbo.vb_offset, 0,
664 accel_state->vbo.vb_offset, 0,
961 struct radeon_accel_state *accel_state = info->accel_state; local
968 if (accel_state->XInited3D)
974 accel_state->XInited3D = TRUE;
1231 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0);
1236 RELOC_BATCH(accel_state->shaders_bo, RADEON_GEM_DOMAIN_VRAM, 0)
1443 struct radeon_accel_state *accel_state = info->accel_state; local
    [all...]

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