Searched refs:chip_class (Results 1 - 25 of 286) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/amd/common/
H A Dac_debug.h59 const char *ac_get_register_name(enum chip_class chip_class, unsigned offset);
60 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset, uint32_t value,
63 unsigned trace_id_count, enum chip_class chip_class,
66 const char *name, enum chip_class chip_class, ac_debug_addr_callback addr_callback,
69 bool ac_vm_fault_occured(enum chip_class chip_class, uint64_
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H A Dac_shader_util.h86 uint32_t ac_vgt_gs_mode(unsigned gs_max_vert_out, enum chip_class chip_class);
88 unsigned ac_get_tbuffer_format(enum chip_class chip_class, unsigned dfmt, unsigned nfmt);
92 enum ac_image_dim ac_get_sampler_dim(enum chip_class chip_class, enum glsl_sampler_dim dim,
95 enum ac_image_dim ac_get_image_dim(enum chip_class chip_class, enum glsl_sampler_dim sdim,
110 unsigned ac_compute_lshs_workgroup_size(enum chip_class chip_class, gl_shader_stag
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H A Dac_shadowed_regs.h57 void ac_get_reg_ranges(enum chip_class chip_class, enum radeon_family family,
62 void ac_check_shadowed_regs(enum chip_class chip_class, enum radeon_family family,
H A Dac_nir.h55 enum chip_class chip_class,
82 enum chip_class chip_class,
87 enum chip_class chip_class,
92 enum chip_class chip_class);
H A Dac_nir.c28 enum chip_class chip_class)
40 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
27 ac_nir_lower_indirect_derefs(nir_shader * shader,enum chip_class chip_class) argument
H A Dac_shader_util.c88 uint32_t ac_vgt_gs_mode(unsigned gs_max_vert_out, enum chip_class chip_class) argument
104 S_028A40_ES_WRITE_OPTIMIZE(chip_class <= GFX8) | S_028A40_GS_WRITE_OPTIMIZE(1) |
105 S_028A40_ONCHIP(chip_class >= GFX9 ? 1 : 0);
110 unsigned ac_get_tbuffer_format(enum chip_class chip_class, unsigned dfmt, unsigned nfmt) argument
117 if (chip_class >= GFX10) {
223 enum ac_image_dim ac_get_sampler_dim(enum chip_class chip_class, enum glsl_sampler_dim dim, argument
228 if (chip_class
250 ac_get_image_dim(enum chip_class chip_class,enum glsl_sampler_dim sdim,bool is_array) argument
524 ac_compute_lshs_workgroup_size(enum chip_class chip_class,gl_shader_stage stage,unsigned tess_num_patches,unsigned tess_patch_in_vtx,unsigned tess_patch_out_vtx) argument
547 ac_compute_esgs_workgroup_size(enum chip_class chip_class,unsigned wave_size,unsigned es_verts,unsigned gs_inst_prims) argument
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H A Dac_debug.c70 enum chip_class chip_class; member in struct:ac_ib_parser
112 static const struct si_reg *find_register(enum chip_class chip_class, unsigned offset) argument
117 switch (chip_class) {
153 const char *ac_get_register_name(enum chip_class chip_class, unsigned offset) argument
155 const struct si_reg *reg = find_register(chip_class, offset);
160 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigne argument
596 ac_parse_ib_chunk(FILE * f,uint32_t * ib_ptr,int num_dw,const int * trace_ids,unsigned trace_id_count,enum chip_class chip_class,ac_debug_addr_callback addr_callback,void * addr_callback_data) argument
643 ac_parse_ib(FILE * f,uint32_t * ib,int num_dw,const int * trace_ids,unsigned trace_id_count,const char * name,enum chip_class chip_class,ac_debug_addr_callback addr_callback,void * addr_callback_data) argument
662 ac_vm_fault_occured(enum chip_class chip_class,uint64_t * old_dmesg_timestamp,uint64_t * out_addr) argument
800 ac_get_wave_info(enum chip_class chip_class,struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP]) argument
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H A Dac_surface_test_common.h38 info->chip_class = GFX9;
53 info->chip_class = GFX9;
69 info->chip_class = GFX9;
84 info->chip_class = GFX9;
99 info->chip_class = GFX10;
114 info->chip_class = GFX10;
129 info->chip_class = GFX10_3;
146 info->chip_class = GFX10_3;
195 switch(info.chip_class) {
H A Dac_nir_lower_esgs_io_to_mem.c45 enum chip_class chip_class; member in struct:__anon01dcf1a20108
130 if (st->chip_class <= GFX8) {
196 nir_ssa_def *vertex_offset = st->chip_class >= GFX9
200 unsigned base_stride = st->chip_class >= GFX9 ? 1 : 64 /* Wave size on GFX6-8 */;
215 if (st->chip_class >= GFX9)
233 enum chip_class chip_class,
237 .chip_class = chip_class,
232 ac_nir_lower_es_outputs_to_mem(nir_shader * shader,enum chip_class chip_class,unsigned num_reserved_es_outputs) argument
248 ac_nir_lower_gs_inputs_to_mem(nir_shader * shader,enum chip_class chip_class,unsigned num_reserved_es_outputs) argument
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/xsrc/external/mit/MesaLib.old/dist/src/amd/common/
H A Dac_debug.h55 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset,
58 unsigned trace_id_count, enum chip_class chip_class,
61 unsigned trace_id_count, const char *name, enum chip_class chip_class,
64 bool ac_vm_fault_occured(enum chip_class chip_class,
H A Dac_shader_util.h41 ac_vgt_gs_mode(unsigned gs_max_vert_out, enum chip_class chip_class);
H A Dac_gpu_info.h58 enum chip_class chip_class; member in struct:radeon_info
161 int ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family);
187 ac_get_num_physical_sgprs(enum chip_class chip_class) argument
189 return chip_class >= VI ? 800 : 512;
H A Dac_debug.c62 enum chip_class chip_class; member in struct:ac_ib_parser
117 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset, argument
122 if (chip_class >= GFX9)
213 ac_dump_reg(f, ib->chip_class, reg + i*4, ac_ib_get(ib), ~0);
263 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
264 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
265 ac_dump_reg(f, ib->chip_class, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
266 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BAS
561 ac_parse_ib_chunk(FILE * f,uint32_t * ib_ptr,int num_dw,const int * trace_ids,unsigned trace_id_count,enum chip_class chip_class,ac_debug_addr_callback addr_callback,void * addr_callback_data) argument
606 ac_parse_ib(FILE * f,uint32_t * ib,int num_dw,const int * trace_ids,unsigned trace_id_count,const char * name,enum chip_class chip_class,ac_debug_addr_callback addr_callback,void * addr_callback_data) argument
626 ac_vm_fault_occured(enum chip_class chip_class,uint64_t * old_dmesg_timestamp,uint64_t * out_addr) argument
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H A Dac_shader_util.c90 ac_vgt_gs_mode(unsigned gs_max_vert_out, enum chip_class chip_class) argument
107 S_028A40_ES_WRITE_OPTIMIZE(chip_class <= VI) |
109 S_028A40_ONCHIP(chip_class >= GFX9 ? 1 : 0);
172 if (ctx->chip_class == SI &&
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/winsys/null/
H A Dradv_null_winsys.c77 info->chip_class = CLASS_UNKNOWN;
82 /* Override family and chip_class. */
87 info->chip_class = GFX10_3;
89 info->chip_class = GFX10;
91 info->chip_class = GFX9;
93 info->chip_class = GFX8;
95 info->chip_class = GFX7;
97 info->chip_class = GFX6;
109 if (info->chip_class >= GFX10_3)
111 else if (info->chip_class >
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/
H A Dsfn_shader_compute.h42 enum chip_class chip_class);
H A Dsfn_shader_tcs.h11 TcsShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel, const r600_shader_key& key, enum chip_class chip_class);
H A Dsfn_shader_geometry.h38 GeometryShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel, const r600_shader_key& key, enum chip_class chip_class);
H A Dsfn_shader_tess_eval.h14 enum chip_class chip_class);
/xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/
H A Dtest_isel.cpp63 if (!set_variant((chip_class)i))
78 PipelineBuilder pbld(get_vk_device((chip_class)i));
86 if (!set_variant((chip_class)i))
103 PipelineBuilder pbld(get_vk_device((chip_class)i));
115 if (!set_variant((chip_class)i))
129 PipelineBuilder pbld(get_vk_device((chip_class)i));
141 if (!set_variant((chip_class)i))
182 PipelineBuilder pbld(get_vk_device((chip_class)i));
H A Dtest_assembler.cpp30 if (!setup_cs(NULL, (chip_class)i))
44 if (!setup_cs(NULL, (chip_class)GFX10))
63 if (!setup_cs(NULL, (chip_class)GFX10))
93 if (!setup_cs(NULL, (chip_class)GFX10))
126 if (!setup_cs(NULL, (chip_class)GFX10))
154 if (!setup_cs(NULL, (chip_class)GFX10))
183 if (!setup_cs(NULL, (chip_class)GFX10))
208 if (!setup_cs(NULL, (chip_class)GFX10))
235 if (!setup_cs(NULL, (chip_class)i))
253 if (!setup_cs(NULL, (chip_class)
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/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A Daco_assembler.cpp45 enum chip_class chip_class; member in struct:aco::asm_context
51 asm_context(Program* program_) : program(program_), chip_class(program->chip_class)
53 if (chip_class <= GFX7)
55 else if (chip_class <= GFX9)
57 else if (chip_class >= GFX10)
124 assert(ctx.chip_class >= GFX10);
128 assert(ctx.chip_class >= GFX10);
150 if (opcode >= 55 && ctx.chip_class <
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/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_debug.c77 ac_vm_fault_occured(device->physical_device->rad_info.chip_class,
106 ac_dump_reg(f, device->physical_device->rad_info.chip_class,
134 if (info->chip_class <= VI) {
184 radv_dump_buffer_descriptor(enum chip_class chip_class, const uint32_t *desc, argument
189 ac_dump_reg(f, chip_class, R_008F00_SQ_BUF_RSRC_WORD0 + j * 4,
194 radv_dump_image_descriptor(enum chip_class chip_class, const uint32_t *desc, argument
199 ac_dump_reg(f, chip_class, R_008F10_SQ_IMG_RSRC_WORD0 + j * 4,
204 ac_dump_reg(f, chip_class, R_008F10_SQ_IMG_RSRC_WORD
209 radv_dump_sampler_descriptor(enum chip_class chip_class,const uint32_t * desc,FILE * f) argument
220 radv_dump_combined_image_sampler_descriptor(enum chip_class chip_class,const uint32_t * desc,FILE * f) argument
228 radv_dump_descriptor_set(enum chip_class chip_class,struct radv_descriptor_set * set,unsigned id,FILE * f) argument
319 enum chip_class chip_class = device->physical_device->rad_info.chip_class; local in function:radv_dump_descriptors
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/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dsi_cmd_buffer.c49 if (physical_device->rad_info.chip_class < GFX7)
61 if (physical_device->rad_info.chip_class < GFX7)
70 if (physical_device->rad_info.chip_class >= GFX7)
91 if (device->physical_device->rad_info.chip_class >= GFX7) {
106 if (device->physical_device->rad_info.chip_class >= GFX9) {
108 device->physical_device->rad_info.chip_class >= GFX10 ? 0x20 : 0);
111 if (device->physical_device->rad_info.chip_class >= GFX10) {
125 if (device->physical_device->rad_info.chip_class <= GFX6) {
140 assert(device->physical_device->rad_info.chip_class == GFX8);
174 if (physical_device->rad_info.chip_class >
719 enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; local in function:si_get_ia_multi_vgt_param
838 si_cs_emit_write_event_eop(struct radeon_cmdbuf * cs,enum chip_class chip_class,bool is_mec,unsigned event,unsigned event_flags,unsigned dst_sel,unsigned data_sel,uint64_t va,uint32_t new_fence,uint64_t gfx9_eop_bug_va) argument
962 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf * cs,enum chip_class chip_class,uint32_t * flush_cnt,uint64_t flush_va,bool is_mec,enum radv_cmd_flush_bits flush_bits,enum rgp_flush_bits * sqtt_flush_bits,uint64_t gfx9_eop_bug_va) argument
1138 si_cs_emit_cache_flush(struct radeon_cmdbuf * cs,enum chip_class chip_class,uint32_t * flush_cnt,uint64_t flush_va,bool is_mec,enum radv_cmd_flush_bits flush_bits,enum rgp_flush_bits * sqtt_flush_bits,uint64_t gfx9_eop_bug_va) argument
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H A Dradv_debug.c85 ac_vm_fault_occured(device->physical_device->rad_info.chip_class, &device->dmesg_timestamp,
116 ac_dump_reg(f, device->physical_device->rad_info.chip_class, offset, value, ~0);
134 if (info->chip_class <= GFX8) {
153 radv_dump_buffer_descriptor(enum chip_class chip_class, const uint32_t *desc, FILE *f) argument
157 ac_dump_reg(f, chip_class, R_008F00_SQ_BUF_RSRC_WORD0 + j * 4, desc[j], 0xffffffff);
161 radv_dump_image_descriptor(enum chip_class chip_class, const uint32_t *desc, FILE *f) argument
164 chip_class >= GFX10 ? R_00A000_SQ_IMG_RSRC_WORD0 : R_008F10_SQ_IMG_RSRC_WORD0;
168 ac_dump_reg(f, chip_class, sq_img_rsrc_word
176 radv_dump_sampler_descriptor(enum chip_class chip_class,const uint32_t * desc,FILE * f) argument
185 radv_dump_combined_image_sampler_descriptor(enum chip_class chip_class,const uint32_t * desc,FILE * f) argument
196 enum chip_class chip_class = device->physical_device->rad_info.chip_class; local in function:radv_dump_descriptor_set
371 enum chip_class chip_class = pipeline->device->physical_device->rad_info.chip_class; local in function:radv_dump_annotated_shaders
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