| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_shader.h | 272 unsigned num_interp; member in struct:radv_shader_variant_info::__anon685e57830908::__anon685e57830b08
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| H A D | radv_shader.c | 766 align(variant->info.fs.num_interp * 48,
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| H A D | radv_pipeline.c | 3374 S_0286D8_NUM_INTERP(ps->info.fs.num_interp));
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| H A D | radv_nir_to_llvm.c | 2500 ctx->shader_info->fs.num_interp = index;
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | evergreen_state.h | 306 evergreen_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp);
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| H A D | r600_state.h | 299 r600_set_spi(ScrnInfoPtr pScrn, drmBufPtr ib, int vs_export_count, int num_interp);
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| H A D | evergreen_accel.c | 427 evergreen_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp) argument
435 E32(((num_interp << NUM_INTERP_shift) |
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| H A D | r6xx_accel.c | 440 r600_set_spi(ScrnInfoPtr pScrn, drmBufPtr ib, int vs_export_count, int num_interp) argument
448 E32(ib, (num_interp << NUM_INTERP_shift));
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| /xsrc/external/mit/xf86-video-ati-kms/dist/src/ |
| H A D | evergreen_state.h | 304 evergreen_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp);
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| H A D | r600_state.h | 275 r600_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp);
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| H A D | evergreen_accel.c | 419 evergreen_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp) argument
427 E32(((num_interp << NUM_INTERP_shift) |
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| H A D | r6xx_accel.c | 371 r600_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp) argument
379 E32((num_interp << NUM_INTERP_shift));
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_shader.h | 311 uint32_t num_interp; member in struct:radv_shader_info::__anonc0b8b2d60908
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| H A D | radv_shader_info.c | 708 info->ps.num_interp = nir->num_inputs;
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| H A D | radv_shader.c | 2093 conf->lds_size * info->lds_encode_granularity + variant->info.ps.num_interp * 48;
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| H A D | radv_pipeline.c | 5084 S_0286D8_NUM_INTERP(ps->info.ps.num_interp) | S_0286D8_PS_W32_EN(ps->info.wave_size == 32));
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_shader.h | 873 unsigned num_interp; member in struct:si_shader::__anon396a2930160a::__anon396a29301a08
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| H A D | si_state_shaders.c | 1558 unsigned num_interp = local in function:si_get_ps_num_interp
1561 assert(num_interp <= 32);
1562 return MIN2(num_interp, 32);
1714 unsigned num_interp = si_get_ps_num_interp(shader); local in function:si_shader_ps
1717 spi_ps_in_control = S_0286D8_NUM_INTERP(num_interp) |
1720 shader->ctx_reg.ps.num_interp = num_interp;
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| H A D | si_state_draw.cpp | 256 sctx->atoms.s.spi_map.emit = sctx->emit_spi_map[sctx->shader.ps.current->ctx_reg.ps.num_interp];
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state_shaders.c | 1143 unsigned num_interp = ps->selector->info.num_inputs + local in function:si_get_ps_num_interp
1146 assert(num_interp <= 32);
1147 return MIN2(num_interp, 32);
2835 unsigned i, num_interp, num_written = 0, bcol_interp[2]; local in function:si_emit_spi_map
2841 num_interp = si_get_ps_num_interp(ps);
2842 assert(num_interp > 0);
2870 assert(num_interp == num_written);
2878 sctx->tracked_regs.spi_ps_input_cntl, num_interp);
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_live_var_analysis.cpp | 390 unsigned lds_param_bytes = lds_bytes_per_interp * program->info->ps.num_interp;
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 21.3.0.rst | 2688 - radeonsi: precompute num_interp for si_emit_spi_map
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