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    Searched refs:MMHUB_BASE (Results 1 - 17 of 17) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_navi10_reg_init.c 41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i]));
amdgpu_navi12_reg_init.c 41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i]));
amdgpu_navi14_reg_init.c 41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i]));
amdgpu_arct_reg_init.c 41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i]));
amdgpu_vega10_reg_init.c 41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i]));
amdgpu_vega20_reg_init.c 41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i]));
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
navi10_ip_offset.h 81 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0, 0 } },
vega20_ip_offset.h 83 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0, 0 } },
navi12_ip_offset.h 111 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } },
navi14_ip_offset.h 111 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } },
renoir_ip_offset.h 146 static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } },
vega10_ip_offset.h 150 static const struct IP_BASE MMHUB_BASE = { { { { 0x0001A000, 0, 0, 0, 0 } },
arct_ip_offset.h 89 static const struct IP_BASE MMHUB_BASE ={ { { { 0x00012440, 0x0001A000, 0x00408800, 0, 0, 0 } },
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_resource.c 154 #define MMHUB_BASE(seg) \
158 .reg_name = MMHUB_BASE(mm ## reg_name ## _BASE_IDX) + \
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_resource.c 204 #define MMHUB_BASE(seg) \
208 .reg_name = MMHUB_BASE(mm ## reg_name ## _BASE_IDX) + \
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_resource.c 329 #define MMHUB_BASE(seg) \
333 .reg_name = MMHUB_BASE(mmMM ## reg_name ## _BASE_IDX) + \
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c 418 #define MMHUB_BASE(seg) \
422 .reg_name = MMHUB_BASE(mmMM ## reg_name ## _BASE_IDX) + \

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