Searched defs:A0_RCP (Results 1 - 16 of 16) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_program.h62 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
H A Di915_reg.h544 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_program.h62 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
H A Di915_reg.h544 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_program.h62 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h95 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
H A Di915_reg.h544 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h95 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
H A Di915_reg.h544 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_reg.h566 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_reg.h429 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_reg.h429 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h547 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
942 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h547 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
942 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h557 #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h531 #define A0_RCP (0x9 << 24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ macro

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