Searched refs:CLK_TOP_UART_SEL (Results 1 - 16 of 16) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8135-clk.h90 #define CLK_TOP_UART_SEL 77 macro
H A Dmt7986-clk.h55 #define CLK_TOP_UART_SEL 30 macro
H A Dmt7629-clk.h93 #define CLK_TOP_UART_SEL 81 macro
H A Dmediatek,mt7981-clk.h95 #define CLK_TOP_UART_SEL 80 macro
H A Dmt6765-clk.h143 #define CLK_TOP_UART_SEL 106 macro
H A Dmt7622-clk.h78 #define CLK_TOP_UART_SEL 64 macro
H A Dmt8173-clk.h103 #define CLK_TOP_UART_SEL 91 macro
H A Dmediatek,mt6795-clk.h101 #define CLK_TOP_UART_SEL 88 macro
H A Dmediatek,mt7988-clk.h69 #define CLK_TOP_UART_SEL 39 macro
H A Dmt2701-clk.h100 #define CLK_TOP_UART_SEL 87 macro
H A Dmt2712-clk.h140 #define CLK_TOP_UART_SEL 107 macro
H A Dmt8192-clk.h35 #define CLK_TOP_UART_SEL 21 macro
H A Dmediatek,mt8365-clk.h81 #define CLK_TOP_UART_SEL 69 macro
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi215 clocks = <&topckgen CLK_TOP_UART_SEL>,
226 clocks = <&topckgen CLK_TOP_UART_SEL>,
237 clocks = <&topckgen CLK_TOP_UART_SEL>,
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi395 clocks = <&topckgen CLK_TOP_UART_SEL>,
406 clocks = <&topckgen CLK_TOP_UART_SEL>,
417 clocks = <&topckgen CLK_TOP_UART_SEL>,
428 clocks = <&topckgen CLK_TOP_UART_SEL>,
604 clocks = <&topckgen CLK_TOP_UART_SEL>,
H A Dmt7986a.dtsi255 assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
258 <&topckgen CLK_TOP_UART_SEL>;

Completed in 18 milliseconds