| /src/sys/arch/evbarm/iq80310/ |
| iq80310_start.S | 54 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
127 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/g42xxeb/ |
| g42xxeb_start.S | 103 tst r2, #CPU_CONTROL_MMU_ENABLE /* we already have a page table? */
132 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/iq80321/ |
| iq80321_start.S | 60 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
136 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/lubbock/ |
| lubbock_start.S | 103 tst r2, #CPU_CONTROL_MMU_ENABLE /* we already have a page table? */
132 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/adi_brh/ |
| brh_start.S | 70 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
174 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/armadaxp/ |
| armadaxp_start.S | 73 movw r1, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE |\
120 | CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
|
| /src/sys/arch/evbarm/hdl_g/ |
| hdlg_start.S | 60 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
179 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/ixdp425/ |
| ixdp425_start.S | 60 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
155 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/ixm1200/ |
| ixm1200_start.S | 63 bic r0, r0, #CPU_CONTROL_MMU_ENABLE
161 orr r1, r1, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/nslu2/ |
| nslu2_start.S | 56 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
151 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/smdk2xx0/ |
| smdk2410_start.S | 134 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
164 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| smdk2800_start.S | 106 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
136 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/stand/boot2440/ |
| entry.S | 81 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
111 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/tsarm/ |
| tsarm_start.S | 57 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
171 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/stand/gzboot/ |
| srtbegin.S | 50 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/hpcarm/hpcarm/ |
| kloader_pxa2x0.S | 55 bic r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/netwinder/netwinder/ |
| nwmmu.S | 113 orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/zaurus/zaurus/ |
| zaurus_start.S | 90 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/arm/arm/ |
| cpufunc.c | 2434 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2438 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2485 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2489 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2534 cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2574 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2578 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2656 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2660 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
2709 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABL
[all...] |
| /src/sys/arch/evbarm/marvell/ |
| marvell_start.S | 244 biceq r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE)
248 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/gumstix/ |
| gumstix_start.S | 187 orr r1, r1, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/imx23_olinuxino/ |
| imx23_olinuxino_start.S | 133 | CPU_CONTROL_AFLT_ENABLE | CPU_CONTROL_MMU_ENABLE)
|
| /src/sys/arch/evbarm/integrator/ |
| intmmu.S | 149 mov r1, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/mmnet/ |
| mmnet_start.S | 157 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
| /src/sys/arch/evbarm/mpcsa/ |
| mpcsa_start.S | 137 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
|
