Searched refs:D0_CHANNEL_X (Results 1 - 18 of 18) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_program.h142 #define D0_CHANNEL_X (1<<10) macro
149 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
H A Di915_reg.h661 #define D0_CHANNEL_X (1<<10) macro
668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_program.h142 #define D0_CHANNEL_X (1<<10) macro
149 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
H A Di915_reg.h661 #define D0_CHANNEL_X (1<<10) macro
668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_program.h142 #define D0_CHANNEL_X (1<<10) macro
149 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h212 #define D0_CHANNEL_X (1<<10) macro
219 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
H A Di915_reg.h661 #define D0_CHANNEL_X (1<<10) macro
668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h212 #define D0_CHANNEL_X (1<<10) macro
219 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
H A Di915_reg.h661 #define D0_CHANNEL_X (1<<10) macro
668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_reg.h549 #define D0_CHANNEL_X (1<<10) macro
556 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_reg.h549 #define D0_CHANNEL_X (1<<10) macro
556 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h664 #define D0_CHANNEL_X (1<<10) macro
671 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
1059 #define D0_CHANNEL_X (1<<10) macro
1066 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h664 #define D0_CHANNEL_X (1<<10) macro
671 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
1059 #define D0_CHANNEL_X (1<<10) macro
1066 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_reg.h686 #define D0_CHANNEL_X (1<<10) macro
693 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h677 #define D0_CHANNEL_X (1<<10) macro
684 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
H A Di915_fpc_translate.c228 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_X);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h654 #define D0_CHANNEL_X (1 << 10) macro
661 #define D0_CHANNEL_XY (D0_CHANNEL_X | D0_CHANNEL_Y)
H A Di915_fpc_translate.c194 i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_X);

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