| /xsrc/external/mit/xf86-video-intel/dist/xvmc/ |
| H A D | i915_program.h | 149 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
150 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| H A D | i915_xvmc.c | 186 D0_CHANNEL_XY);
190 D0_CHANNEL_XY);
218 D0_CHANNEL_XY);
222 D0_CHANNEL_XY);
251 D0_CHANNEL_XY);
255 D0_CHANNEL_XY);
259 D0_CHANNEL_XY);
263 D0_CHANNEL_XY);
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| H A D | i915_reg.h | 668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
669 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| /xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/ |
| H A D | i915_program.h | 149 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
150 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| H A D | i915_xvmc.c | 186 D0_CHANNEL_XY);
190 D0_CHANNEL_XY);
218 D0_CHANNEL_XY);
222 D0_CHANNEL_XY);
251 D0_CHANNEL_XY);
255 D0_CHANNEL_XY);
259 D0_CHANNEL_XY);
263 D0_CHANNEL_XY);
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| H A D | i915_reg.h | 668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
669 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| /xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/ |
| H A D | i915_program.h | 149 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
150 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| H A D | i915_xvmc.c | 231 i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
234 i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
259 i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY);
262 i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY);
287 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
290 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
293 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY);
296 i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY);
1348 i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
1351 i915_inst_decl(inst, REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
[all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | i915_3d.h | 219 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
220 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
| H A D | i915_reg.h | 668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
669 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | i915_3d.h | 219 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
220 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
| H A D | i915_reg.h | 668 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
669 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/ |
| H A D | i915_reg.h | 556 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
557 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/ |
| H A D | i915_reg.h | 556 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
557 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | gen3_render.h | 671 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
672 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
1066 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
1067 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | gen3_render.h | 671 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
672 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
1066 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
1067 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
|
| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | i915_reg.h | 693 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
694 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 684 #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) macro
685 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/ |
| H A D | i915_reg.h | 661 #define D0_CHANNEL_XY (D0_CHANNEL_X | D0_CHANNEL_Y) macro
662 #define D0_CHANNEL_XYZ (D0_CHANNEL_XY | D0_CHANNEL_Z)
|