Searched refs:gart (Results 1 - 25 of 36) sorted by relevance

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/xsrc/external/mit/xf86-video-nouveau/dist/src/
H A Dnouveau_copy.c75 .gart = NvDmaTT,
H A Dnv04_xv_blit.c114 fifo->vram, fifo->gart);
H A Dnv04_exa.c413 PUSH_RELOC(push, src, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
414 PUSH_RELOC(push, dst, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv30/
H A Dnv30_transfer.c440 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
441 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
451 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
461 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
513 PUSH_DATA (push, (src->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
514 PUSH_DATA (push, (dst->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
704 PUSH_DATA (push, (s_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
705 PUSH_DATA (push, (d_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
H A Dnv30_screen.c686 PUSH_DATA (push, fifo->gart); /* TEXTURE1 */
692 PUSH_DATA (push, fifo->gart); /* VTXBUF1 */
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/nouveau/
H A Dnv04_context.c95 PUSH_DATA (push, fifo->gart);
103 PUSH_DATA (push, fifo->gart);
H A Dnv04_surface.c242 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
298 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
299 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
441 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
442 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
H A Dnv20_context.c110 PUSH_DATA (push, fifo->gart);
116 PUSH_DATA (push, fifo->gart);
H A Dnv10_context.c215 PUSH_DATA (push, fifo->gart);
216 PUSH_DATA (push, fifo->gart);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv30/
H A Dnv30_transfer.c440 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
441 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
451 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
461 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
513 PUSH_DATA (push, (src->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
514 PUSH_DATA (push, (dst->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
704 PUSH_DATA (push, (s_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
705 PUSH_DATA (push, (d_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
H A Dnv30_screen.c701 PUSH_DATA (push, fifo->gart); /* TEXTURE1 */
707 PUSH_DATA (push, fifo->gart); /* VTXBUF1 */
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/nouveau/
H A Dnv04_context.c96 PUSH_DATA (push, fifo->gart);
104 PUSH_DATA (push, fifo->gart);
H A Dnv04_surface.c238 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
294 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
295 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
437 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
438 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
H A Dnv10_context.c216 PUSH_DATA (push, fifo->gart);
217 PUSH_DATA (push, fifo->gart);
H A Dnv20_context.c111 PUSH_DATA (push, fifo->gart);
117 PUSH_DATA (push, fifo->gart);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dcompute_memory_pool.c605 struct pipe_resource* gart = (struct pipe_resource*)pool->bo; local in function:compute_memory_transfer
611 assert(gart);
618 map = pipe->transfer_map(pipe, gart, 0, PIPE_TRANSFER_READ,
626 map = pipe->transfer_map(pipe, gart, 0, PIPE_TRANSFER_WRITE,
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dcompute_memory_pool.c604 struct pipe_resource* gart = (struct pipe_resource*)pool->bo; local in function:compute_memory_transfer
610 assert(gart);
617 map = pipe->buffer_map(pipe, gart, 0, PIPE_MAP_READ,
625 map = pipe->buffer_map(pipe, gart, 0, PIPE_MAP_WRITE,
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D10.5.7.rst68 - nv30/draw: allocate vertex buffers in gart
/xsrc/external/mit/libdrm/dist/nouveau/
H A Dnouveau.h247 uint32_t gart; member in struct:nv04_fifo
H A Dabi16.c41 .tt_ctxdma_handle = nv04->gart
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/
H A Dnouveau_screen.c178 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
H A Dnouveau_video.c503 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
597 PUSH_DATA (push, nv04_data.gart);
600 PUSH_DATA (push, nv04_data.gart);
H A Dnouveau_vp3_video.c379 struct nv04_fifo nv04_data = {.vram = 0xbeef0201, .gart = 0xbeef0202};
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/
H A Dnouveau_screen.c194 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
H A Dnouveau_video.c503 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
597 PUSH_DATA (push, nv04_data.gart);
600 PUSH_DATA (push, nv04_data.gart);

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