Searched refs:ir3_shader_debug (Results 1 - 25 of 25) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/
H A Dir3_compiler.h77 enum ir3_shader_debug { enum
87 extern enum ir3_shader_debug ir3_shader_debug;
93 case MESA_SHADER_VERTEX: return !!(ir3_shader_debug & IR3_DBG_SHADER_VS);
94 case MESA_SHADER_FRAGMENT: return !!(ir3_shader_debug & IR3_DBG_SHADER_FS);
95 case MESA_SHADER_COMPUTE: return !!(ir3_shader_debug & IR3_DBG_SHADER_CS);
H A Dir3_compiler.c42 DEBUG_GET_ONCE_FLAGS_OPTION(ir3_shader_debug, "IR3_SHADER_DEBUG", shader_debug_options, 0)
44 enum ir3_shader_debug ir3_shader_debug = 0; variable in typeref:enum:ir3_shader_debug
50 ir3_shader_debug = debug_get_option_ir3_shader_debug();
H A Dir3_nir.c192 if (ir3_shader_debug & IR3_DBG_DISASM) {
249 if (ir3_shader_debug & IR3_DBG_DISASM) {
H A Dir3_nir_analyze_ubo_ranges.c60 if ((block > 0) && (ir3_shader_debug & IR3_DBG_NOUBOOPT))
H A Dir3_shader.c159 if (ir3_shader_debug & IR3_DBG_DISASM) {
295 if (ir3_shader_debug & IR3_DBG_DISASM) {
H A Dir3_compiler_nir.c2873 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
2902 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
2914 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
2921 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
2939 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
2950 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
3006 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
H A Dir3_context.c91 if (ir3_shader_debug & IR3_DBG_DISASM) {
H A Dir3_cp.c623 !(ir3_shader_debug & IR3_DBG_FORCES2EN)) {
H A Dir3_ra.c905 if (ir3_shader_debug & IR3_DBG_OPTMSGS) {
/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_compiler.h187 enum ir3_shader_debug { enum
210 extern enum ir3_shader_debug ir3_shader_debug;
216 if (ir3_shader_debug & IR3_DBG_DISASM)
221 return !!(ir3_shader_debug & IR3_DBG_SHADER_VS);
223 return !!(ir3_shader_debug & IR3_DBG_SHADER_TCS);
225 return !!(ir3_shader_debug & IR3_DBG_SHADER_TES);
227 return !!(ir3_shader_debug & IR3_DBG_SHADER_GS);
229 return !!(ir3_shader_debug & IR3_DBG_SHADER_FS);
231 return !!(ir3_shader_debug
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H A Dir3_compiler.c57 DEBUG_GET_ONCE_FLAGS_OPTION(ir3_shader_debug, "IR3_SHADER_DEBUG",
62 enum ir3_shader_debug ir3_shader_debug = 0; variable in typeref:enum:ir3_shader_debug
78 ir3_shader_debug = debug_get_option_ir3_shader_debug();
83 ir3_shader_debug |= IR3_DBG_NOCACHE;
H A Dir3_disk_cache.c51 if (ir3_shader_debug & IR3_DBG_NOCACHE)
65 uint64_t driver_flags = ir3_shader_debug;
H A Dir3_nir.c394 if (ir3_shader_debug & IR3_DBG_DISASM) {
429 if (ir3_shader_debug & IR3_DBG_DISASM) {
530 !(ir3_shader_debug & IR3_DBG_NOFP16)) {
630 if (ir3_shader_debug & IR3_DBG_DISASM) {
749 if (ir3_shader_debug & IR3_DBG_DISASM) {
H A Dir3_ra.h32 #define RA_DEBUG (ir3_shader_debug & IR3_DBG_RAMSGS)
H A Dir3_nir_analyze_ubo_ranges.c140 if (ir3_shader_debug & IR3_DBG_NOUBOOPT)
H A Dir3_cp.c624 !(ir3_shader_debug & IR3_DBG_FORCES2EN)) {
H A Dir3_merge_regs.c580 if (ir3_shader_debug & IR3_DBG_RAMSGS)
H A Dir3_postsched.c35 #define SCHED_DEBUG (ir3_shader_debug & IR3_DBG_SCHEDMSGS)
H A Dir3_sched.c34 #define SCHED_DEBUG (ir3_shader_debug & IR3_DBG_SCHEDMSGS)
H A Dir3_shader.c375 if (ir3_shader_debug & IR3_DBG_DISASM) {
H A Dir3_ra.c2244 if (ir3_shader_debug & IR3_DBG_SPILLALL)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/ir3/
H A Dir3_cmdline.c305 ir3_shader_debug |= IR3_DBG_OPTMSGS | IR3_DBG_DISASM;
387 if (ir3_shader_debug & IR3_DBG_OPTMSGS)
393 if (ir3_shader_debug & IR3_DBG_OPTMSGS)
H A Dir3_gallium.c293 if (ir3_shader_debug & IR3_DBG_DISASM) {
341 if (ir3_shader_debug & IR3_DBG_DISASM) {
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/ir3/
H A Dir3_cmdline.c307 ir3_shader_debug |= IR3_DBG_OPTMSGS | IR3_DBG_DISASM;
462 if (ir3_shader_debug & IR3_DBG_OPTMSGS)
468 if (ir3_shader_debug & IR3_DBG_OPTMSGS)
H A Dir3_gallium.c133 if (ir3_shader_debug & IR3_DBG_DISASM) {
170 if (ir3_shader_debug & IR3_DBG_DISASM) {

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