| /src/sys/arch/mips/sibyte/include/ |
| bcm1480_l2c.h | 59 #define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_MGMT_INDEX)
64 #define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_MGMT_WAY)
72 #define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_BCM1480_L2C_MGMT_ECC_DIAG)
87 #define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5,S_BCM1480_L2C_TAG_MBZ)
90 #define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_TAG_INDEX)
96 #define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23,S_BCM1480_L2C_TAG_TAG)
101 #define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6,S_BCM1480_L2C_TAG_ECC)
106 #define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_TAG_WAY)
114 #define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10,S_BCM1480_L2C_DATA_ECC)
124 #define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_REMOTE
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| bcm1480_rld.h | 58 #define M_BCM1480_RLD_WAY_ENABLE _SB_MAKEMASK(8,S_BCM1480_RLD_WAY_ENABLE)
67 #define M_BCM1480_RLD_RANDOM_SEED _SB_MAKEMASK(8,S_BCM1480_RLD_RANDOM_SEED)
76 #define M_BCM1480_RLD_FIELD_OFFSET _SB_MAKEMASK(5,S_BCM1480_RLD_FIELD_OFFSET)
81 #define M_BCM1480_RLD_FIELD_INDEX _SB_MAKEMASK(11,S_BCM1480_RLD_FIELD_INDEX)
86 #define M_BCM1480_RLD_FIELD_TAG _SB_MAKEMASK(20,S_BCM1480_RLD_FIELD_TAG)
91 #define M_BCM1480_RLD_FIELD_WAY_SELECT _SB_MAKEMASK(3,S_BCM1480_RLD_FIELD_WAY_SELECT)
99 #define M_BCM1480_RLD_FIELD_NODE_VECTOR _SB_MAKEMASK(11,S_BCM1480_RLD_FIELD_NODE_VECTOR)
104 #define M_BCM1480_RLD_FIELD_ECC_BITS _SB_MAKEMASK(7,S_BCM1480_RLD_FIELD_ECC_BITS)
116 #define M_BCM1480_RLD_TRIGGER_TAG _SB_MAKEMASK(20,S_BCM1480_RLD_TRIGGER_TAG)
124 #define M_BCM1480_RLD_TRIGGER_NODE_VECTOR _SB_MAKEMASK(11,S_BCM1480_RLD_TRIGGER_NODE_VECTOR
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| bcm1480_hsp.h | 65 #define M_BCM1480_HSP_RX_PLL_MULTIPLIER _SB_MAKEMASK(5,S_BCM1480_HSP_RX_PLL_MULTIPLIER)
70 #define M_BCM1480_HSP_TRAIN_CYCLE_COUNT _SB_MAKEMASK(8,S_BCM1480_HSP_TRAIN_CYCLE_COUNT)
75 #define M_BCM1480_HSP_DIP4_ERR_CLEAR _SB_MAKEMASK(4,S_BCM1480_HSP_DIP4_ERR_CLEAR)
80 #define M_BCM1480_DIP4_ERR_LIMIT _SB_MAKEMASK(4,S_BCM1480_DIP4_ERR_LIMIT)
87 #define M_BCM1480_HSP_LINK_MODE _SB_MAKEMASK(2,S_BCM1480_HSP_LINK_MODE)
104 #define M_BCM1480_HSP_RX_DESKEW_BIT(b) _SB_MAKEMASK(2,S_BCM1480_HSP_RX_DESKEW_BIT(b))
114 #define M_BCM1480_HSP_RX_DESKEW_PER_BIT _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DESKEW_PER_BIT)
130 #define M_BCM1480_HSP_TX_PLL_MULTIPLIER _SB_MAKEMASK(5,S_BCM1480_HSP_TX_PLL_MULTIPLIER)
135 #define M_BCM1480_HSP_TX_RST_TRAINCNT _SB_MAKEMASK(16,S_BCM1480_HSP_TX_RST_TRAINCNT)
140 #define M_BCM1480_HSP_TX_RST_STATCNT _SB_MAKEMASK(4,S_BCM1480_HSP_TX_RST_STATCNT
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| sb1250_l2c.h | 59 #define M_L2C_TAG_MBZ _SB_MAKEMASK(5,S_L2C_TAG_MBZ)
62 #define M_L2C_TAG_INDEX _SB_MAKEMASK(12,S_L2C_TAG_INDEX)
67 #define M_L2C_TAG_TAG _SB_MAKEMASK(23,S_L2C_TAG_TAG)
72 #define M_L2C_TAG_ECC _SB_MAKEMASK(6,S_L2C_TAG_ECC)
77 #define M_L2C_TAG_WAY _SB_MAKEMASK(2,S_L2C_TAG_WAY)
89 #define M_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_L2C_MGMT_INDEX)
94 #define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2,S_L2C_MGMT_QUADRANT)
99 #define M_L2C_MGMT_HALF _SB_MAKEMASK(1,S_L2C_MGMT_HALF)
102 #define M_L2C_MGMT_WAY _SB_MAKEMASK(2,S_L2C_MGMT_WAY)
107 #define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_L2C_MGMT_ECC_DIAG
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| bcm1480_hr.h | 57 #define M_BCM1480_HR_RX2PMI_MAP_LO _SB_MAKEMASK(4,S_BCM1480_HR_RX2PMI_MAP_LO)
67 #define M_BCM1480_HR_RX2PMI_MAP_HI _SB_MAKEMASK(4,S_BCM1480_HR_RX2PMI_MAP_HI)
77 #define M_BCM1480_HR_HEADER_PTR _SB_MAKEMASK(8,S_BCM1480_HR_HEADER_PTR)
94 #define M_BCM1480_HR_RULE_OP_OPERAND_3 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_OPERAND_3)
99 #define M_BCM1480_HR_RULE_OP_OPERAND_2 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_OPERAND_2)
104 #define M_BCM1480_HR_RULE_OP_OPERAND_1 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_OPERAND_1)
109 #define M_BCM1480_HR_RULE_OP_OPERAND_0 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_OPERAND_0)
114 #define M_BCM1480_HR_RULE_OP_ENABLE_3 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_ENABLE_3)
119 #define M_BCM1480_HR_RULE_OP_ENABLE_2 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_ENABLE_2)
124 #define M_BCM1480_HR_RULE_OP_ENABLE_1 _SB_MAKEMASK(8,S_BCM1480_HR_RULE_OP_ENABLE_1
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| bcm1480_pm.h | 62 #define M_BCM1480_PM_BASE _SB_MAKEMASK(40,S_BCM1480_PM_BASE)
67 #define M_BCM1480_PM_SIZE _SB_MAKEMASK(20,S_BCM1480_PM_SIZE)
76 #define M_BCM1480_PM_DS_MT_CNT _SB_MAKEMASK(6,S_BCM1480_PM_DS_MT_CNT)
85 #define M_BCM1480_PM_HDR_SIZE _SB_MAKEMASK(9,S_BCM1480_PM_HDR_SIZE)
94 #define M_BCM1480_PM_COUNT _SB_MAKEMASK(20,S_BCM1480_PM_COUNT)
103 #define M_BCM1480_PM_LAST _SB_MAKEMASK(20,S_BCM1480_PM_LAST)
117 #define M_BCM1480_PM_SW_ERROR _SB_MAKEMASK(3,S_BCM1480_PM_SW_ERROR)
130 #define M_BCM1480_PM_INT_CORE_ID _SB_MAKEMASK(2,S_BCM1480_PM_INT_CORE_ID)
137 #define M_BCM1480_PM_INT_TIMEOUT _SB_MAKEMASK(5,S_BCM1480_PM_INT_TIMEOUT)
142 #define M_BCM1480_PM_INT_PKT_CNT _SB_MAKEMASK(12,S_BCM1480_PM_INT_PKT_CNT
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| sb1250_mc.h | 59 #define M_MC_RESERVED0 _SB_MAKEMASK(8,S_MC_RESERVED0)
62 #define M_MC_CHANNEL_SEL _SB_MAKEMASK(8,S_MC_CHANNEL_SEL)
67 #define M_MC_BANK0_MAP _SB_MAKEMASK(4,S_MC_BANK0_MAP)
75 #define M_MC_BANK1_MAP _SB_MAKEMASK(4,S_MC_BANK1_MAP)
83 #define M_MC_BANK2_MAP _SB_MAKEMASK(4,S_MC_BANK2_MAP)
91 #define M_MC_BANK3_MAP _SB_MAKEMASK(4,S_MC_BANK3_MAP)
98 #define M_MC_RESERVED1 _SB_MAKEMASK(8,32)
101 #define M_MC_QUEUE_SIZE _SB_MAKEMASK(4,S_MC_QUEUE_SIZE)
107 #define M_MC_AGE_LIMIT _SB_MAKEMASK(4,S_MC_AGE_LIMIT)
113 #define M_MC_WR_LIMIT _SB_MAKEMASK(4,S_MC_WR_LIMIT
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| sb1250_scd.h | 61 #define M_SYS_RESERVED _SB_MAKEMASK(8,0)
64 #define M_SYS_REVISION _SB_MAKEMASK(8,S_SYS_REVISION)
113 #define M_SYS_L2C_SIZE _SB_MAKEMASK(4,S_SYS_L2C_SIZE)
129 #define M_SYS_NUM_CPUS _SB_MAKEMASK(4,S_SYS_NUM_CPUS)
136 #define M_SYS_PART _SB_MAKEMASK(16,S_SYS_PART)
150 #define M_SYS_SOC_TYPE _SB_MAKEMASK(4,S_SYS_SOC_TYPE)
189 #define M_SYS_WID _SB_MAKEMASK(32,S_SYS_WID)
201 #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200)
206 #define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN)
212 #define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200
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| sb1250_uart.h | 65 #define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR)
83 #define M_DUART_PARITY_MODE _SB_MAKEMASK(2,S_DUART_PARITY_MODE)
107 #define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3,0) /* ignored */
118 #define M_DUART_CHAN_MODE _SB_MAKEMASK(2,S_DUART_CHAN_MODE)
141 #define M_DUART_MISC_CMD _SB_MAKEMASK(3,S_DUART_MISC_CMD)
186 #define M_DUART_CLK_COUNTER _SB_MAKEMASK(12,0)
197 #define M_DUART_RX_DATA _SB_MAKEMASK(8,0)
198 #define M_DUART_TX_DATA _SB_MAKEMASK(8,0)
220 #define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL)
223 #define M_DUART_IN_PIN_CHNG _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG
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| sb1250_genbus.h | 66 #define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL)
90 #define M_IO_TIMEOUT _SB_MAKEMASK(8,S_IO_TIMEOUT)
99 #define M_IO_MULT_SIZE _SB_MAKEMASK(12,S_IO_MULT_SIZE)
110 #define M_IO_START_ADDR _SB_MAKEMASK(14,S_IO_START_ADDR)
124 #define M_IO_ALE_WIDTH _SB_MAKEMASK(3,S_IO_ALE_WIDTH)
134 #define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS)
141 #define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH)
147 #define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH)
152 #define M_IO_RDY_SMPLE _SB_MAKEMASK(3,S_IO_RDY_SMPLE)
162 #define M_IO_ALE_TO_WRITE _SB_MAKEMASK(3,S_IO_ALE_TO_WRITE
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| bcm1480_mc.h | 59 #define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0)
65 #define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1)
71 #define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV2)
77 #define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8,S_BCM1480_MC_CS_MODE)
100 #define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12,S_BCM1480_MC_CS0_START)
105 #define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12,S_BCM1480_MC_CS1_START)
110 #define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12,S_BCM1480_MC_CS2_START)
115 #define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12,S_BCM1480_MC_CS3_START)
124 #define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12,S_BCM1480_MC_CS0_END)
129 #define M_BCM1480_MC_CS1_END _SB_MAKEMASK(12,S_BCM1480_MC_CS1_END
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| sb1250_dma.h | 76 #define M_DMA_DESC_TYPE _SB_MAKEMASK(2,S_DMA_DESC_TYPE)
95 #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8,S_DMA_INT_PKTCNT)
100 #define M_DMA_RINGSZ _SB_MAKEMASK(16,S_DMA_RINGSZ)
105 #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16,S_DMA_HIGH_WATERMARK)
110 #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16,S_DMA_LOW_WATERMARK)
135 #define M_DMA_MBZ1 _SB_MAKEMASK(6,15)
138 #define M_DMA_HDR_SIZE _SB_MAKEMASK(9,S_DMA_HDR_SIZE)
142 #define M_DMA_MBZ2 _SB_MAKEMASK(5,32)
145 #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9,S_DMA_ASICXFR_SIZE)
150 #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16,S_DMA_INT_TIMEOUT
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| bcm1480_scd.h | 118 #define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_PLL_DIV)
123 #define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_SW_DIV)
131 #define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2,S_BCM1480_SYS_BOOT_MODE)
148 #define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6,S_BCM1480_SYS_CONFIG)
152 #define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32,15)
155 #define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4,S_BCM1480_SYS_NODEID)
215 #define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5,S_BCM1480_SCD_WDOG_RESET_TYPE)
263 #define M_SPC_CFG_SRC4 _SB_MAKEMASK(8,S_SPC_CFG_SRC4)
268 #define M_SPC_CFG_SRC5 _SB_MAKEMASK(8,S_SPC_CFG_SRC5)
273 #define M_SPC_CFG_SRC6 _SB_MAKEMASK(8,S_SPC_CFG_SRC6
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| sb1250_mac.h | 74 #define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3,S_MAC_TX_PAUSE)
95 #define M_MAC_RESERVED1 _SB_MAKEMASK(8,9)
110 #define M_MAC_RESERVED3 _SB_MAKEMASK(6,26)
116 #define M_MAC_SPEED_SEL _SB_MAKEMASK(2,S_MAC_SPEED_SEL)
136 #define M_MAC_BYPASS_CFG _SB_MAKEMASK(2,S_MAC_BYPASS_CFG)
157 #define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
172 #define M_MAC_FC_CMD _SB_MAKEMASK(2,S_MAC_FC_CMD)
177 #define M_MAC_RX_CH_SEL _SB_MAKEMASK(7,S_MAC_RX_CH_SEL)
221 #define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0)
226 #define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1
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| sb1250_smbus.h | 60 #define M_SMB_FREQ_DIV _SB_MAKEMASK(13,S_SMB_FREQ_DIV)
68 #define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD)
117 #define M_SMB_ADDR _SB_MAKEMASK(7,S_SMB_ADDR)
124 #define M_SMB_TT _SB_MAKEMASK(3,S_SMB_TT)
153 #define M_SMB_LB _SB_MAKEMASK(8,S_SMB_LB)
157 #define M_SMB_MB _SB_MAKEMASK(8,S_SMB_MB)
166 #define M_SPEC_PEC _SB_MAKEMASK(8,S_SPEC_PEC)
173 #define M_SMB_CMDH _SB_MAKEMASK(8,S_SMB_CMDH)
179 #define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT)
202 #define M_SMB_AFMT _SB_MAKEMASK(2,S_SMB_AFMT
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| sb1250_wid.h | 64 #define M_WID_BIN _SB_MAKEMASK(3,S_WID_BIN)
145 #define M_WID_L2QTR _SB_MAKEMASK(2,S_WID_L2QTR)
152 #define M_WID_CPU0_L1I _SB_MAKEMASK(2,S_WID_CPU0_L1I)
157 #define M_WID_CPU0_L1D _SB_MAKEMASK(2,S_WID_CPU0_L1D)
162 #define M_WID_CPU1_L1I _SB_MAKEMASK(2,S_WID_CPU1_L1I)
167 #define M_WID_CPU1_L1D _SB_MAKEMASK(2,S_WID_CPU1_L1D)
177 #define M_WID_CPUX_L1I _SB_MAKEMASK(2,S_WID_CPUX_L1I)
182 #define M_WID_CPUX_L1D _SB_MAKEMASK(2,S_WID_CPUX_L1D)
190 #define M_WID_WAFERID _SB_MAKEMASK(5,S_WID_WAFERID)
195 #define M_WID_LOTID _SB_MAKEMASK(14,S_WID_LOTID
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| sb1250_syncser.h | 62 #define M_SYNCSER_FLAG_NUM _SB_MAKEMASK(4,S_SYNCSER_FLAG_NUM)
78 #define M_SYNCSER_RXSYNC_DLY _SB_MAKEMASK(2,S_SYNCSER_RXSYNC_DLY)
91 #define M_SYNCSER_TXSYNC_DLY _SB_MAKEMASK(2,S_SYNCSER_TXSYNC_DLY)
156 #define M_SYNCSER_SEQ_COUNT _SB_MAKEMASK(4,S_SYNCSER_SEQ_COUNT)
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| sb1250_int.h | 169 #define M_INT_MBOX_ALL _SB_MAKEMASK(4,K_INT_MBOX_0)
227 #define M_INT_LDT_INTMSG _SB_MAKEMASK(3,S_INT_LDT_INTMSG)
247 #define M_INT_LDT_INTDEST _SB_MAKEMASK(10,S_INT_LDT_INTDEST)
252 #define M_INT_LDT_VECTOR _SB_MAKEMASK(8,S_INT_LDT_VECTOR)
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| bcm1480_pci.h | 81 #define M_BCM1480_PCI_DLL_BYPASS_MODE _SB_MAKEMASK(2,S_BCM1480_PCI_DLL_BYPASS_MODE)
91 #define M_BCM1480_PCI_DLL_FIXED_VALUE _SB_MAKEMASK(6,S_BCM1480_PCI_DLL_FIXED_VALUE)
96 #define M_BCM1480_PCI_DLL_DELAY _SB_MAKEMASK(4,S_BCM1480_PCI_DLL_DELAY)
101 #define M_BCM1480_PCI_DLL_STEP_SIZE _SB_MAKEMASK(4,S_BCM1480_PCI_DLL_STEP_SIZE)
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| bcm1480_int.h | 176 #define _BCM1480_INT_MASK(w,n) _SB_MAKEMASK(w,((n) & 0x3F))
288 #define M_BCM1480_INT_HT_INTMSG _SB_MAKEMASK(3,S_BCM1480_INT_HT_INTMSG)
310 #define M_BCM1480_INT_HT_INTDEST _SB_MAKEMASK(8,S_BCM1480_INT_HT_INTDEST)
315 #define M_BCM1480_INT_HT_VECTOR _SB_MAKEMASK(8,S_BCM1480_INT_HT_VECTOR)
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| sb1250_defs.h | 251 #define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
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