Searched refs:A1_SRC0_CHANNEL_W_SHIFT (Results 1 - 25 of 26) sorted by relevance

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/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_program.h105 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
265 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h587 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_program.h105 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
265 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h587 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_program.h105 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
267 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h138 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
416 A1_SRC0_CHANNEL_W_SHIFT, \
469 A1_SRC0_CHANNEL_W_SHIFT, \
H A Di915_reg.h587 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h138 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
416 A1_SRC0_CHANNEL_W_SHIFT, \
469 A1_SRC0_CHANNEL_W_SHIFT, \
H A Di915_reg.h587 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_debug_fp.c236 #define GET_SRC0_REG(r0, r1) ((r0<<14)|(r1>>A1_SRC0_CHANNEL_W_SHIFT))
H A Di915_reg.h473 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
H A Di915_program.c63 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_debug_fp.c239 #define GET_SRC0_REG(r0, r1) ((r0<<14)|(r1>>A1_SRC0_CHANNEL_W_SHIFT))
H A Di915_reg.h473 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
H A Di915_program.c63 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h590 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
985 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
1263 A1_SRC0_CHANNEL_W_SHIFT, \
1316 A1_SRC0_CHANNEL_W_SHIFT, \
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h590 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
985 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
1263 A1_SRC0_CHANNEL_W_SHIFT, \
1316 A1_SRC0_CHANNEL_W_SHIFT, \
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_debug_fp.c251 #define GET_SRC0_REG(r0, r1) ((r0<<14)|(r1>>A1_SRC0_CHANNEL_W_SHIFT))
H A Di915_fpc.h175 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h601 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_debug_fp.c187 #define GET_SRC0_REG(r0, r1) ((r0 << 14) | (r1 >> A1_SRC0_CHANNEL_W_SHIFT))
H A Di915_fpc.h165 (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
H A Di915_reg.h575 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_3d.h307 A1_SRC0_CHANNEL_W_SHIFT;
H A Di915_reg.h610 #define A1_SRC0_CHANNEL_W_SHIFT 16 macro

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