Searched refs:SS3_TCZ_ADDR_MODE_SHIFT (Results 1 - 16 of 16) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_state_sampler.c120 state[1] |= (TEXCOORDMODE_CLAMP_EDGE << SS3_TCZ_ADDR_MODE_SHIFT);
H A Di915_reg.h816 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
H A Di915_state.c319 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_texstate.c353 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
H A Di915_reg.h711 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_texstate.c353 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
H A Di915_reg.h711 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_reg.h826 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_reg.h826 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_reg.h826 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_reg.h826 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_reg.h853 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h841 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
H A Di915_state.c267 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h829 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h829 #define SS3_TCZ_ADDR_MODE_SHIFT 6 macro

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