Searched refs:aux_usage (Results 1 - 25 of 88) sorted by relevance

1234

/xsrc/external/mit/MesaLib/dist/src/intel/isl/
H A Disl_drm.c100 .aux_usage = ISL_AUX_USAGE_CCS_E,
107 .aux_usage = ISL_AUX_USAGE_GFX12_CCS_E,
114 .aux_usage = ISL_AUX_USAGE_MC,
121 .aux_usage = ISL_AUX_USAGE_GFX12_CCS_E,
H A Disl_surface_state.c356 s.DepthStencilResource = info->aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT ||
357 info->aux_usage == ISL_AUX_USAGE_STC_CCS;
601 assert(info->aux_usage == ISL_AUX_USAGE_NONE);
629 if (info->aux_usage != ISL_AUX_USAGE_NONE) {
632 assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
633 info->aux_usage == ISL_AUX_USAGE_CCS_E ||
634 info->aux_usage == ISL_AUX_USAGE_GFX12_CCS_E ||
635 info->aux_usage == ISL_AUX_USAGE_MC ||
636 info->aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT ||
637 info->aux_usage
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
H A Diris_resolve.c212 enum isl_aux_usage aux_usage = local in function:iris_predraw_resolve_framebuffer
217 if (ice->state.draw_aux_usage[i] != aux_usage) {
218 ice->state.draw_aux_usage[i] = aux_usage;
226 aux_usage);
229 aux_usage);
297 enum isl_aux_usage aux_usage = ice->state.draw_aux_usage[i]; local in function:iris_postdraw_update_resolve_tracking
300 aux_usage);
308 aux_usage);
363 format_aux_tuple(enum isl_format format, enum isl_aux_usage aux_usage) argument
365 return (void *)(uintptr_t)((uint32_t)format << 8 | aux_usage);
369 iris_cache_flush_for_render(struct iris_batch * batch,struct iris_bo * bo,enum isl_format format,enum isl_aux_usage aux_usage) argument
407 iris_render_cache_add_bo(struct iris_batch * batch,struct iris_bo * bo,enum isl_format format,enum isl_aux_usage aux_usage) argument
746 get_ccs_d_resolve_op(enum isl_aux_state aux_state,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
778 get_ccs_e_resolve_op(enum isl_aux_state aux_state,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
826 iris_resource_prepare_ccs_access(struct iris_context * ice,struct iris_batch * batch,struct iris_resource * res,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
870 iris_resource_finish_ccs_write(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage) argument
944 iris_resource_prepare_mcs_access(struct iris_context * ice,struct iris_batch * batch,struct iris_resource * res,uint32_t layer,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
975 iris_resource_finish_mcs_write(struct iris_context * ice,struct iris_resource * res,uint32_t layer,enum isl_aux_usage aux_usage) argument
1001 iris_resource_prepare_hiz_access(struct iris_context * ice,struct iris_batch * batch,struct iris_resource * res,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
1058 iris_resource_finish_hiz_write(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage) argument
1104 iris_resource_prepare_access(struct iris_context * ice,struct iris_batch * batch,struct iris_resource * res,uint32_t start_level,uint32_t num_levels,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
1165 iris_resource_finish_write(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage) argument
1360 enum isl_aux_usage aux_usage = local in function:iris_resource_prepare_texture
1429 iris_resource_prepare_render(struct iris_context * ice,struct iris_batch * batch,struct iris_resource * res,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
1441 iris_resource_finish_render(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
[all...]
H A Diris_resource.h317 enum isl_aux_usage aux_usage,
345 enum isl_aux_usage aux_usage);
420 enum isl_aux_usage aux_usage);
424 enum isl_aux_usage aux_usage);
H A Diris_blit.c235 enum isl_aux_usage aux_usage,
241 if (aux_usage == ISL_AUX_USAGE_HIZ &&
243 aux_usage = ISL_AUX_USAGE_NONE;
253 .aux_usage = aux_usage,
256 if (aux_usage != ISL_AUX_USAGE_NONE) {
232 iris_blorp_surf_for_resource(struct iris_vtable * vtbl,struct blorp_surf * surf,struct pipe_resource * p_res,enum isl_aux_usage aux_usage,unsigned level,bool is_render_target) argument
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_resolve.c281 enum isl_aux_usage aux_usage = local in function:crocus_predraw_resolve_framebuffer
286 if (ice->state.draw_aux_usage[i] != aux_usage) {
287 ice->state.draw_aux_usage[i] = aux_usage;
295 aux_usage);
298 aux_usage);
373 enum isl_aux_usage aux_usage = ice->state.draw_aux_usage[i]; local in function:crocus_postdraw_update_resolve_tracking
376 aux_usage);
384 aux_usage);
446 format_aux_tuple(enum isl_format format, enum isl_aux_usage aux_usage) argument
448 return (void *)(uintptr_t)((uint32_t)format << 8 | aux_usage);
452 crocus_cache_flush_for_render(struct crocus_batch * batch,struct crocus_bo * bo,enum isl_format format,enum isl_aux_usage aux_usage) argument
490 crocus_render_cache_add_bo(struct crocus_batch * batch,struct crocus_bo * bo,enum isl_format format,enum isl_aux_usage aux_usage) argument
820 crocus_resource_prepare_access(struct crocus_context * ice,struct crocus_resource * res,uint32_t start_level,uint32_t num_levels,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
879 crocus_resource_finish_write(struct crocus_context * ice,struct crocus_resource * res,uint32_t level,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage) argument
967 enum isl_aux_usage aux_usage = local in function:crocus_resource_prepare_texture
1019 crocus_resource_prepare_render(struct crocus_context * ice,struct crocus_resource * res,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
1030 crocus_resource_finish_render(struct crocus_context * ice,struct crocus_resource * res,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
[all...]
H A Dcrocus_resource.h418 enum isl_aux_usage aux_usage,
446 enum isl_aux_usage aux_usage);
510 res->mod_info->aux_usage != ISL_AUX_USAGE_NONE;
537 enum isl_aux_usage aux_usage);
541 enum isl_aux_usage aux_usage);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_resolve.c141 enum isl_aux_usage aux_usage = local in function:resolve_image_views
147 aux_usage, false);
239 enum isl_aux_usage aux_usage = local in function:iris_predraw_resolve_framebuffer
244 if (ice->state.draw_aux_usage[i] != aux_usage) {
245 ice->state.draw_aux_usage[i] = aux_usage;
254 aux_usage);
256 iris_cache_flush_for_render(batch, res->bo, aux_usage);
318 enum isl_aux_usage aux_usage = ice->state.draw_aux_usage[i]; local in function:iris_postdraw_update_resolve_tracking
326 aux_usage);
334 enum isl_aux_usage aux_usage)
332 iris_cache_flush_for_render(struct iris_batch * batch,struct iris_bo * bo,enum isl_aux_usage aux_usage) argument
714 iris_resource_prepare_access(struct iris_context * ice,struct iris_resource * res,uint32_t start_level,uint32_t num_levels,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
770 iris_resource_finish_write(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage) argument
921 enum isl_aux_usage aux_usage = local in function:iris_image_view_aux_usage
982 enum isl_aux_usage aux_usage = local in function:iris_resource_prepare_texture
1088 iris_resource_prepare_render(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
1099 iris_resource_finish_render(struct iris_context * ice,struct iris_resource * res,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
[all...]
H A Diris_resource.h404 enum isl_aux_usage aux_usage,
432 enum isl_aux_usage aux_usage);
523 enum isl_aux_usage aux_usage);
527 enum isl_aux_usage aux_usage);
/xsrc/external/mit/MesaLib.old/dist/src/intel/isl/
H A Disl_drm.c94 .aux_usage = ISL_AUX_USAGE_CCS_E,
H A Disl_surface_state.c501 assert(info->aux_usage == ISL_AUX_USAGE_NONE);
529 if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) {
545 assert(GEN_GEN >= 9 || info->aux_usage != ISL_AUX_USAGE_CCS_E);
553 if (info->aux_usage == ISL_AUX_USAGE_HIZ) {
572 s.AuxiliarySurfaceMode = isl_to_gen_aux_mode[info->aux_usage];
574 assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
575 info->aux_usage == ISL_AUX_USAGE_CCS_D);
605 if (GEN_GEN >= 9 && info->aux_usage == ISL_AUX_USAGE_HIZ)
612 if (info->aux_usage != ISL_AUX_USAGE_NONE) {
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dintel_mipmap_tree.c264 assert(mt->aux_usage == ISL_AUX_USAGE_CCS_E);
365 assert(mt->aux_usage == ISL_AUX_USAGE_NONE);
369 mt->aux_usage = ISL_AUX_USAGE_MCS;
374 mt->aux_usage = ISL_AUX_USAGE_CCS_E;
376 mt->aux_usage = ISL_AUX_USAGE_CCS_D;
380 mt->aux_usage = ISL_AUX_USAGE_HIZ;
386 if (mt->aux_usage != ISL_AUX_USAGE_NONE)
767 if (mt->aux_usage != ISL_AUX_USAGE_CCS_D &&
855 if (mt->aux_usage != ISL_AUX_USAGE_CCS_D &&
1027 if (mod_info && mod_info->aux_usage !
2006 get_ccs_d_resolve_op(enum isl_aux_state aux_state,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
2038 get_ccs_e_resolve_op(enum isl_aux_state aux_state,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
2086 intel_miptree_prepare_ccs_access(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
2130 intel_miptree_finish_ccs_write(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage) argument
2203 intel_miptree_prepare_mcs_access(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t layer,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
2233 intel_miptree_finish_mcs_write(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t layer,enum isl_aux_usage aux_usage) argument
2259 intel_miptree_prepare_hiz_access(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
2315 intel_miptree_finish_hiz_write(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t layer,enum isl_aux_usage aux_usage) argument
2361 intel_miptree_prepare_access(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t start_level,uint32_t num_levels,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
2425 intel_miptree_finish_write(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage) argument
2627 enum isl_aux_usage aux_usage = local in function:intel_miptree_prepare_texture
2701 intel_miptree_prepare_render(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
2711 intel_miptree_finish_render(struct brw_context * brw,struct intel_mipmap_tree * mt,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
2747 enum isl_aux_usage aux_usage = ISL_AUX_USAGE_NONE; local in function:intel_miptree_prepare_external
[all...]
H A Dintel_fbo.h241 enum isl_aux_usage aux_usage);
245 enum isl_aux_usage aux_usage);
H A Dbrw_draw.c358 if (tex_mt->aux_usage != ISL_AUX_USAGE_CCS_D &&
359 tex_mt->aux_usage != ISL_AUX_USAGE_CCS_E)
419 gen9_astc5x5_wa_bits(mesa_format format, enum isl_aux_usage aux_usage) argument
421 if (aux_usage != ISL_AUX_USAGE_NONE &&
422 aux_usage != ISL_AUX_USAGE_MCS)
438 enum isl_aux_usage aux_usage)
440 gen9_apply_astc5x5_wa_flush(brw, gen9_astc5x5_wa_bits(format, aux_usage));
500 tex_obj->mt->aux_usage);
647 enum isl_aux_usage aux_usage = local in function:brw_predraw_resolve_framebuffer
651 if (brw->draw_aux_usage[i] != aux_usage) {
436 gen9_apply_single_tex_astc5x5_wa(struct brw_context * brw,mesa_format format,enum isl_aux_usage aux_usage) argument
737 enum isl_aux_usage aux_usage = brw->draw_aux_usage[i]; local in function:brw_postdraw_set_buffers_need_resolve
[all...]
H A Dintel_mipmap_tree.h258 enum isl_aux_usage aux_usage; member in struct:intel_mipmap_tree
369 * that the miptree will be created with mt->aux_usage == NONE.
547 enum isl_aux_usage aux_usage,
574 enum isl_aux_usage aux_usage);
640 enum isl_aux_usage aux_usage);
645 enum isl_aux_usage aux_usage);
H A Dbrw_blorp.c125 enum isl_aux_usage aux_usage,
153 .aux_usage = aux_usage,
158 if (surf->aux_usage == ISL_AUX_USAGE_HIZ &&
160 surf->aux_usage = ISL_AUX_USAGE_NONE;
162 if (surf->aux_usage != ISL_AUX_USAGE_NONE) {
186 assert((surf->aux_usage == ISL_AUX_USAGE_NONE) ==
190 gen9_apply_single_tex_astc5x5_wa(brw, mt->format, surf->aux_usage);
459 switch (src_mt->aux_usage) {
462 src_aux_usage = src_mt->aux_usage;
122 blorp_surf_for_miptree(struct brw_context * brw,struct blorp_surf * surf,const struct intel_mipmap_tree * mt,enum isl_aux_usage aux_usage,bool is_render_target,unsigned * level,unsigned start_layer,unsigned num_layers) argument
1332 enum isl_aux_usage aux_usage = local in function:do_single_blorp_clear
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_genX.h64 enum isl_aux_usage aux_usage,
H A Danv_image.c277 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
356 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
419 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
474 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
487 image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
1066 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ);
1070 return image->planes[plane].aux_usage;
1086 return image->planes[plane].aux_usage;
1102 return mod_info ? mod_info->aux_usage : ISL_AUX_USAGE_NONE;
1109 if (image->planes[plane].aux_usage
1173 enum isl_aux_usage aux_usage = local in function:anv_layout_to_fast_clear_type
1245 anv_image_fill_surface_state(struct anv_device * device,const struct anv_image * image,VkImageAspectFlagBits aspect,const struct isl_view * view_in,isl_surf_usage_flags_t view_usage,enum isl_aux_usage aux_usage,const union isl_color_value * clear_color,enum anv_image_view_state_flags flags,struct anv_surface_state * state_inout,struct brw_image_param * image_param_out) argument
[all...]
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_fbo.h241 enum isl_aux_usage aux_usage);
245 enum isl_aux_usage aux_usage);
H A Dbrw_mipmap_tree.h258 enum isl_aux_usage aux_usage; member in struct:brw_mipmap_tree
369 * that the miptree will be created with mt->aux_usage == NONE.
539 enum isl_aux_usage aux_usage,
566 enum isl_aux_usage aux_usage);
632 enum isl_aux_usage aux_usage);
637 enum isl_aux_usage aux_usage);
H A Dbrw_mipmap_tree.c76 assert(mt->aux_usage == ISL_AUX_USAGE_CCS_E);
168 assert(mt->aux_usage == ISL_AUX_USAGE_NONE);
172 mt->aux_usage = ISL_AUX_USAGE_MCS;
175 mt->aux_usage = ISL_AUX_USAGE_CCS_E;
177 mt->aux_usage = ISL_AUX_USAGE_CCS_D;
180 mt->aux_usage = ISL_AUX_USAGE_HIZ;
186 if (mt->aux_usage != ISL_AUX_USAGE_NONE)
567 if (mt->aux_usage != ISL_AUX_USAGE_CCS_D &&
569 mt->aux_usage = ISL_AUX_USAGE_NONE;
655 if (mt->aux_usage !
1762 brw_miptree_prepare_access(struct brw_context * brw,struct brw_mipmap_tree * mt,uint32_t start_level,uint32_t num_levels,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage,bool fast_clear_supported) argument
1806 brw_miptree_finish_write(struct brw_context * brw,struct brw_mipmap_tree * mt,uint32_t level,uint32_t start_layer,uint32_t num_layers,enum isl_aux_usage aux_usage) argument
1986 enum isl_aux_usage aux_usage = local in function:brw_miptree_prepare_texture
2059 brw_miptree_prepare_render(struct brw_context * brw,struct brw_mipmap_tree * mt,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
2069 brw_miptree_finish_render(struct brw_context * brw,struct brw_mipmap_tree * mt,uint32_t level,uint32_t start_layer,uint32_t layer_count,enum isl_aux_usage aux_usage) argument
2105 enum isl_aux_usage aux_usage = ISL_AUX_USAGE_NONE; local in function:brw_miptree_prepare_external
[all...]
H A Dbrw_blorp.c122 enum isl_aux_usage aux_usage,
150 .aux_usage = aux_usage,
155 if (surf->aux_usage == ISL_AUX_USAGE_HIZ &&
157 surf->aux_usage = ISL_AUX_USAGE_NONE;
159 if (surf->aux_usage != ISL_AUX_USAGE_NONE) {
182 assert((surf->aux_usage == ISL_AUX_USAGE_NONE) ==
186 gfx9_apply_single_tex_astc5x5_wa(brw, mt->format, surf->aux_usage);
458 switch (src_mt->aux_usage) {
461 src_aux_usage = src_mt->aux_usage;
119 blorp_surf_for_miptree(struct brw_context * brw,struct blorp_surf * surf,const struct brw_mipmap_tree * mt,enum isl_aux_usage aux_usage,bool is_render_target,unsigned * level,unsigned start_layer,unsigned num_layers) argument
1310 enum isl_aux_usage aux_usage = local in function:do_single_blorp_clear
[all...]
H A Dbrw_draw.c389 if (tex_mt->aux_usage != ISL_AUX_USAGE_CCS_D &&
390 tex_mt->aux_usage != ISL_AUX_USAGE_CCS_E)
450 gfx9_astc5x5_wa_bits(mesa_format format, enum isl_aux_usage aux_usage) argument
452 if (aux_usage != ISL_AUX_USAGE_NONE &&
453 aux_usage != ISL_AUX_USAGE_MCS)
469 enum isl_aux_usage aux_usage)
471 gfx9_apply_astc5x5_wa_flush(brw, gfx9_astc5x5_wa_bits(format, aux_usage));
529 tex_obj->mt->aux_usage);
676 enum isl_aux_usage aux_usage = local in function:brw_predraw_resolve_framebuffer
680 if (brw->draw_aux_usage[i] != aux_usage) {
467 gfx9_apply_single_tex_astc5x5_wa(struct brw_context * brw,mesa_format format,enum isl_aux_usage aux_usage) argument
766 enum isl_aux_usage aux_usage = brw->draw_aux_usage[i]; local in function:brw_postdraw_set_buffers_need_resolve
[all...]
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_image.c460 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
472 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
566 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
579 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT;
582 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS;
591 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT)
603 image->planes[plane].aux_usage = ISL_AUX_USAGE_STC_CCS;
664 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
672 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_D;
698 image->planes[plane].aux_usage
1968 const enum isl_aux_usage aux_usage = image->planes[plane].aux_usage; local in function:anv_layout_to_aux_state
2339 anv_image_fill_surface_state(struct anv_device * device,const struct anv_image * image,VkImageAspectFlagBits aspect,const struct isl_view * view_in,isl_surf_usage_flags_t view_usage,enum isl_aux_usage aux_usage,const union isl_color_value * clear_color,enum anv_image_view_state_flags flags,struct anv_surface_state * state_inout,struct brw_image_param * image_param_out) argument
[all...]
/xsrc/external/mit/MesaLib/dist/src/intel/blorp/
H A Dblorp.h112 enum isl_aux_usage aux_usage; member in struct:blorp_surf
179 enum isl_aux_usage aux_usage);
210 enum isl_aux_usage aux_usage,

Completed in 33 milliseconds

1234