| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_cp_reg_shadowing.c | 30 static void si_build_load_reg(struct si_screen *sscreen, struct si_pm4_state *pm4,
59 si_pm4_cmd_add(pm4, PKT3(packet, 1 + num_ranges * 2, 0));
60 si_pm4_cmd_add(pm4, gpu_address);
61 si_pm4_cmd_add(pm4, gpu_address >> 32);
63 si_pm4_cmd_add(pm4, (ranges[i].offset - offset) / 4);
64 si_pm4_cmd_add(pm4, ranges[i].size / 4);
71 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
74 si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
75 si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
79 si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0))
[all...] |
| si_pm4.h | 54 uint32_t pm4[SI_PM4_MAX_DW]; member in struct:si_pm4_state
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| si_pm4.c | 40 state->pm4[state->ndw++] = dw;
48 state->pm4[state->last_pm4] = PKT3(state->last_opcode, count, predicate);
84 state->pm4[state->ndw++] = reg;
88 state->pm4[state->ndw++] = val;
126 radeon_emit_array(state->pm4, state->ndw);
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| si_state.c | 438 struct si_pm4_state *pm4 = &blend->pm4; local
470 si_pm4_set_reg(pm4, R_028B70_DB_ALPHA_TO_MASK,
476 si_pm4_set_reg(pm4, R_028B70_DB_ALPHA_TO_MASK,
512 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
522 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
532 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
588 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
624 si_pm4_set_reg(pm4, R_028760_SX_MRT0_BLEND_OPT + i * 4, sx_mrt_blend_opt[i]);
631 si_pm4_set_reg(pm4, R_028808_CB_COLOR_CONTROL, color_control)
915 struct si_pm4_state *pm4 = &rs->pm4; local
1054 struct si_pm4_state *pm4 = &rs->pm4_poly_offset[i]; local
1260 struct si_pm4_state *pm4 = &dsa->pm4; local
5343 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
[all...] |
| si_state_shaders.c | 473 si_pm4_clear_state(&shader->pm4);
474 shader->pm4.is_shader = true;
475 return &shader->pm4;
530 struct si_pm4_state *pm4; local
535 pm4 = si_get_shader_pm4_state(shader);
536 if (!pm4)
540 si_pm4_set_reg(pm4, R_00B520_SPI_SHADER_PGM_LO_LS, va >> 8);
553 struct si_pm4_state *pm4; local
556 pm4 = si_get_shader_pm4_state(shader);
557 if (!pm4)
628 struct si_pm4_state *pm4; local
843 struct si_pm4_state *pm4; local
1160 struct si_pm4_state *pm4 = si_get_shader_pm4_state(shader); local
1415 struct si_pm4_state *pm4; local
1614 struct si_pm4_state *pm4; local
3571 struct si_pm4_state *pm4; local
3960 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
3991 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
[all...] |
| si_state.h | 54 struct si_pm4_state pm4; member in struct:si_state_blend
72 struct si_pm4_state pm4; member in struct:si_state_rasterizer
125 struct si_pm4_state pm4; member in struct:si_state_dsa
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| si_shader.h | 766 struct si_pm4_state pm4; /* base class */ member in struct:si_shader
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| si_state_draw.cpp | 239 struct si_pm4_state **pm4 = &sctx->vgt_shader_config[key.index]; local
240 if (unlikely(!*pm4))
241 *pm4 = si_build_vgt_shader_config(sctx->screen, key);
242 si_pm4_bind_state(sctx, vgt_shader_config, *pm4);
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| si_debug.c | 126 * PM4 packets etc.
417 ac_parse_ib(f, ctx->cs_preamble_state->pm4, ctx->cs_preamble_state->ndw, NULL, 0,
421 ac_parse_ib(f, ctx->cs_preamble_gs_rings->pm4, ctx->cs_preamble_gs_rings->ndw, NULL, 0,
|
| /xsrc/external/mit/libdrm/dist/tests/amdgpu/ |
| amdgpu_stress.c | 145 uint32_t *pm4; variable
202 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_COPY_SI, 0, 0, 0,
204 pm4[i++] = 0xffffffff & dst;
205 pm4[i++] = 0xffffffff & src;
206 pm4[i++] = (0xffffffff00000000 & dst) >> 32;
207 pm4[i++] = (0xffffffff00000000 & src) >> 32;
209 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY,
213 pm4[i++] = bytes - 1;
215 pm4[i++] = bytes;
216 pm4[i++] = 0
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_state_shaders.c | 341 struct si_pm4_state *pm4)
399 assert(pm4->shader);
400 pm4->shader->vgt_tf_param = S_028B6C_TYPE(type) |
423 struct si_pm4_state *pm4)
443 assert(pm4->shader);
444 pm4->shader->vgt_vertex_reuse_block_cntl = vtx_reuse_depth;
450 if (shader->pm4)
451 si_pm4_clear_state(shader->pm4);
453 shader->pm4 = CALLOC_STRUCT(si_pm4_state);
455 if (shader->pm4) {
472 struct si_pm4_state *pm4; local
505 struct si_pm4_state *pm4; local
584 struct si_pm4_state *pm4; local
836 struct si_pm4_state *pm4; local
1019 struct si_pm4_state *pm4; local
1203 struct si_pm4_state *pm4; local
2911 struct si_pm4_state *pm4; local
3302 struct si_pm4_state **pm4 = &sctx->vgt_shader_config[index]; local
[all...] |
| si_pm4.c | 37 state->pm4[state->ndw++] = dw;
44 state->pm4[state->last_pm4] =
134 radeon_emit_array(cs, state->pm4, state->ndw);
183 state->pm4[i] = 0x80000000; /* type2 nop packet */
186 state->pm4[i] = 0xffff1000; /* type3 nop packet */
190 0, aligned_ndw *4, state->pm4);
|
| si_state.c | 457 struct si_pm4_state *pm4 = &blend->pm4; local
475 si_pm4_set_reg(pm4, R_028B70_DB_ALPHA_TO_MASK,
513 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
524 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
534 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
598 si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
631 si_pm4_set_reg(pm4, R_028760_SX_MRT0_BLEND_OPT + i * 4,
640 si_pm4_set_reg(pm4, R_028808_CB_COLOR_CONTROL, color_control);
852 struct si_pm4_state *pm4 = &rs->pm4 local
952 struct si_pm4_state *pm4 = &rs->pm4_poly_offset[i]; local
1167 struct si_pm4_state *pm4 = &dsa->pm4; local
4928 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
[all...] |
| si_pm4.h | 55 uint32_t pm4[SI_PM4_MAX_DW]; member in struct:si_pm4_state
|
| si_state.h | 49 struct si_pm4_state pm4; member in struct:si_state_blend
65 struct si_pm4_state pm4; member in struct:si_state_rasterizer
113 struct si_pm4_state pm4; member in struct:si_state_dsa
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| si_shader.h | 602 struct si_pm4_state *pm4; member in struct:si_shader
|
| si_debug.c | 112 * PM4 packets etc.
412 ac_parse_ib(f, ctx->init_config->pm4, ctx->init_config->ndw,
417 ac_parse_ib(f, ctx->init_config_gs_rings->pm4,
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| msm_kgsl.h | 373 unsigned int pm4; member in struct:kgsl_ucode_version
|
