Searched refs:CLK_TOP_PWM_SEL (Results 1 - 19 of 19) sorted by relevance
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/ |
| H A D | mt7986-clk.h | 56 #define CLK_TOP_PWM_SEL 31 macro
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| H A D | mt7629-clk.h | 89 #define CLK_TOP_PWM_SEL 77 macro
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| H A D | mt8516-clk.h | 190 #define CLK_TOP_PWM_SEL 156 macro
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| H A D | mediatek,mt7981-clk.h | 96 #define CLK_TOP_PWM_SEL 81 macro
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| H A D | mt6765-clk.h | 158 #define CLK_TOP_PWM_SEL 121 macro
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| H A D | mt7622-clk.h | 74 #define CLK_TOP_PWM_SEL 60 macro
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| H A D | mt8173-clk.h | 98 #define CLK_TOP_PWM_SEL 86 macro
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| H A D | mediatek,mt6795-clk.h | 96 #define CLK_TOP_PWM_SEL 83 macro
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| H A D | mediatek,mt7988-clk.h | 76 #define CLK_TOP_PWM_SEL 46 macro
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| H A D | mt2701-clk.h | 96 #define CLK_TOP_PWM_SEL 83 macro
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| H A D | mt2712-clk.h | 135 #define CLK_TOP_PWM_SEL 102 macro
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| H A D | mt8192-clk.h | 68 #define CLK_TOP_PWM_SEL 54 macro
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| H A D | mediatek,mt8365-clk.h | 101 #define CLK_TOP_PWM_SEL 89 macro
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/mediatek/ |
| H A D | mt7629.dtsi | 247 clocks = <&topckgen CLK_TOP_PWM_SEL>,
251 assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>;
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| H A D | mt7623.dtsi | 423 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7986a.dtsi | 202 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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| H A D | mt7622.dtsi | 439 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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| H A D | mt6795.dtsi | 604 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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| H A D | mt2712e.dtsi | 482 clocks = <&topckgen CLK_TOP_PWM_SEL>,
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