History log of /src/sys/arch/powerpc/booke/e500_tlb.c |
Revision | | Date | Author | Comments |
1.24 |
| 31-May-2022 |
andvar | fix various typos in comments, documentation and messages.
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1.23 |
| 07-Jul-2020 |
rin | Revert previous; tmpfs should be fixed instead.
Pointed out by thorpej@, thanks!
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1.22 |
| 07-Jul-2020 |
rin | Fix kernel panic due to tmpfs.
pmap for booke assumes that the ``va'' argument for pmap_kenter_pa(9) is page-aligned. However, by recent changes, tmpfs became to use ``va'' with page offset via ubc_uiomove(9). So, truncate it to page boundary.
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1.21 |
| 06-Jul-2020 |
rin | Include missing opt_multiprocessor.h and opt_pmap.h.
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1.20 |
| 06-Jul-2020 |
rin | Style and cosmetic changes. No binary changes intended.
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1.19 |
| 03-Sep-2018 |
riastradh | Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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1.18 |
| 11-Jul-2016 |
matt | branches: 1.18.16; 1.18.18; Adapt to common pmap changes.
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1.17 |
| 19-Feb-2015 |
nonaka | fix compile failure without DIAGNOSTIC.
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1.16 |
| 23-Jan-2015 |
nonaka | - Use tlbivax instruction for TLB update/invalidate when MULTIPROCESSOR is defined. Because TLB entry operation is not notified to another CPU. - When TLB1 is updated, send IPI_TLB1SYNC to another CPU.
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1.15 |
| 28-Dec-2014 |
nonaka | include "opt_ppcparam.h" for VERBOSE_INITPPC.
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1.14 |
| 26-Dec-2014 |
nonaka | fix typo.
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1.13 |
| 09-Dec-2013 |
wiz | branches: 1.13.4; 1.13.6; Fix typo ("then" instead of "than")
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1.12 |
| 27-Nov-2012 |
matt | branches: 1.12.2; Make the 85xx get closer to spinning up the secondary CPUs. Don't assume TLB1[0] has the mapping for VA/PA 0. Make sure the TLB1 entries that map physical memory have the M (memory coherent) bit set.
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1.11 |
| 25-Jul-2012 |
matt | branches: 1.11.2; When dealing with kernel invalidations, make sure to use context-synchronizing instructions.
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1.10 |
| 18-Jul-2012 |
matt | Don't assume 1:1 PA:VA mapping
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1.9 |
| 18-Jul-2012 |
matt | Fix some SHIFTOUT to SHIFTIN Add a lookup of tlb1 by pa. fix comparisions of xtlb entries by using masks. (since xtlb can looked up by pa & va and va may not equal pa).
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1.8 |
| 29-Mar-2012 |
matt | Add support PMAP_MINIMALTLB option. This changes the default use of TLB1 entries to map all of physical memory to using two TLB1 entries, one for mapping text and one for data. The rest of memory is mapped using the page table which is updated as needed. This is used to trap memory corruption issues.
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1.7 |
| 30-Jun-2011 |
matt | branches: 1.7.2; 1.7.6; 1.7.8; Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
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1.6 |
| 29-Jun-2011 |
matt | Don't use TLB1 entries for device access if they are writethrough or not cache-inhibited.
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1.5 |
| 23-Jun-2011 |
matt | Cleanup comments in pmap_tlb.c. Attach tlb evcnts. eliminate ti_mask Cleanup some of the MP code. Conditionalize shootdown code.
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1.4 |
| 23-Jun-2011 |
matt | Switch to using the common <common/pmap/tlb/tlb.h>
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1.3 |
| 05-Jun-2011 |
matt | Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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1.2 |
| 18-Jan-2011 |
matt | branches: 1.2.4; 1.2.6; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
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1.1 |
| 07-Jan-2011 |
matt | branches: 1.1.2; 1.1.4; file e500_tlb.c was initially added on branch matt-nb5-pq3.
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1.1.4.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
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1.1.2.3 |
| 14-Oct-2011 |
matt | Sync with current pulling P2020 and other newer processor support.
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1.1.2.2 |
| 26-Jul-2011 |
matt | When matching a TLB1 entry for an I/O mapping, make sure it's not cachable.
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1.1.2.1 |
| 07-Jan-2011 |
matt | Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
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1.2.6.1 |
| 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
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1.2.4.3 |
| 12-Jun-2011 |
rmind | sync with head
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1.2.4.2 |
| 05-Mar-2011 |
rmind | sync with head
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1.2.4.1 |
| 18-Jan-2011 |
rmind | file e500_tlb.c was added on branch rmind-uvmplock on 2011-03-05 20:51:34 +0000
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1.7.8.1 |
| 09-May-2012 |
riz | Pull up following revision(s) (requested by matt in ticket #241): sys/arch/powerpc/conf/kern-mb.ldscript: revision 1.1 sys/arch/powerpc/include/booke/pmap.h: revision 1.9 sys/arch/powerpc/booke/e500_tlb.c: revision 1.8 sys/arch/powerpc/conf/files.powerpc: revision 1.83 sys/arch/powerpc/booke/booke_pmap.c: revision 1.13 sys/arch/powerpc/include/booke/e500var.h: revision 1.5 sys/arch/evbppc/mpc85xx/machdep.c: revision 1.23 Add ldscript which aligns .data to a 1MB boundary. (used for testing) Add PMAP_MINIMALTLB defflag Add vsize_t to pmap_md_{un,}map_poolpage. Add pmap_kvptefill prototype. Slightly change pmap_bootstrap prototype. Add e500_tlb_minimize prototype. Add support PMAP_MINIMALTLB option. This changes the default use of TLB1 entries to map all of physical memory to using two TLB1 entries, one for mapping text and one for data. The rest of memory is mapped using the page table which is updated as needed. This is used to trap memory corruption issues. Add support for PMAP_MINIMALTLB.
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1.7.6.1 |
| 05-Apr-2012 |
mrg | sync to latest -current.
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1.7.2.4 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
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1.7.2.3 |
| 16-Jan-2013 |
yamt | sync with (a bit old) head
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1.7.2.2 |
| 30-Oct-2012 |
yamt | sync with head
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1.7.2.1 |
| 17-Apr-2012 |
yamt | sync with head
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1.11.2.3 |
| 03-Dec-2017 |
jdolecek | update from HEAD
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1.11.2.2 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
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1.11.2.1 |
| 25-Feb-2013 |
tls | resync with head
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1.12.2.1 |
| 18-May-2014 |
rmind | sync with head
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1.13.6.2 |
| 05-Oct-2016 |
skrll | Sync with HEAD
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1.13.6.1 |
| 06-Apr-2015 |
skrll | Sync with HEAD
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1.13.4.1 |
| 21-Feb-2015 |
martin | Pull up following revision(s) (requested by nonaka in ticket #535): sys/arch/powerpc/booke/e500_tlb.c: revision 1.17 fix compile failure without DIAGNOSTIC.
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1.18.18.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
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1.18.16.1 |
| 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
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