Searched refs:S5_STENCIL_WRITE_ENABLE (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h159 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
H A Di915_state.c874 dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
876 dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h159 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
H A Di915_state.c874 dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
876 dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_reg.h416 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_reg.h416 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_reg.h416 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_reg.h416 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_reg.h432 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h412 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
H A Di915_state.c485 S5_STENCIL_WRITE_ENABLE |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h391 #define S5_STENCIL_WRITE_ENABLE (1 << 3) macro
H A Di915_state.c408 return (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE |
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h419 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h419 #define S5_STENCIL_WRITE_ENABLE (1<<3) macro

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