Searched refs:S6_TRISTRIP_PV_SHIFT (Results 1 - 18 of 18) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_state_immediate.c162 unsigned LIS6 = (2 << S6_TRISTRIP_PV_SHIFT);
H A Di915_reg.h435 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h182 #define S6_TRISTRIP_PV_SHIFT 0 macro
H A Di915_state.c941 (2 << S6_TRISTRIP_PV_SHIFT));
1037 i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1041 i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h182 #define S6_TRISTRIP_PV_SHIFT 0 macro
H A Di915_state.c941 (2 << S6_TRISTRIP_PV_SHIFT));
1037 i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1041 i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_video.c127 (2 << S6_TRISTRIP_PV_SHIFT));
H A Di915_reg.h455 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_video.c145 S6_COLOR_WRITE_ENABLE | (2 << S6_TRISTRIP_PV_SHIFT));
H A Di915_reg.h438 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_video.c145 S6_COLOR_WRITE_ENABLE | (2 << S6_TRISTRIP_PV_SHIFT));
H A Di915_reg.h438 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_reg.h438 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_reg.h438 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h413 #define S6_TRISTRIP_PV_SHIFT 0 macro
H A Di915_state.c933 cso->LIS6 |= (2 << S6_TRISTRIP_PV_SHIFT);
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h441 #define S6_TRISTRIP_PV_SHIFT 0 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h441 #define S6_TRISTRIP_PV_SHIFT 0 macro

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