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Searched refs:ST1_ENABLE (Results 1 - 25 of 30) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A D	i830_state.c	`480 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE; 522 i830->state.Stipple[I830_STPREG_ST1] \|= ST1_ENABLE; 896 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE; 898 i830->state.Stipple[I830_STPREG_ST1] \|= ST1_ENABLE;`
H A D	i915_state.c	`446 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE; 488 i915->state.Stipple[I915_STPREG_ST1] \|= ST1_ENABLE; 892 i915->state.Stipple[I915_STPREG_ST1] \|= ST1_ENABLE; 894 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;`
H A D	i830_reg.h	`516 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`723 #define ST1_ENABLE (1<<16) macro`
H A D	i830_vtbl.c	`211 st1 &= ~ST1_ENABLE; 216 st1 \|= ST1_ENABLE;`
H A D	i915_vtbl.c	`73 st1 &= ~ST1_ENABLE; 79 st1 \|= ST1_ENABLE;`
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A D	i830_state.c	`480 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE; 522 i830->state.Stipple[I830_STPREG_ST1] \|= ST1_ENABLE; 896 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE; 898 i830->state.Stipple[I830_STPREG_ST1] \|= ST1_ENABLE;`
H A D	i915_state.c	`446 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE; 488 i915->state.Stipple[I915_STPREG_ST1] \|= ST1_ENABLE; 892 i915->state.Stipple[I915_STPREG_ST1] \|= ST1_ENABLE; 894 i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;`
H A D	i830_reg.h	`516 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`723 #define ST1_ENABLE (1<<16) macro`
H A D	i830_vtbl.c	`211 st1 &= ~ST1_ENABLE; 216 st1 \|= ST1_ENABLE;`
H A D	i915_vtbl.c	`72 st1 &= ~ST1_ENABLE; 78 st1 \|= ST1_ENABLE;`
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A D	gen2_render.h	`558 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A D	i830_reg.h	`636 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`838 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A D	i830_reg.h	`630 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`838 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A D	gen2_render.h	`558 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A D	i830_reg.h	`630 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`838 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A D	i830_reg.h	`630 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`838 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A D	i830_reg.h	`570 #define ST1_ENABLE (1<<16) macro`
H A D	i915_reg.h	`865 #define ST1_ENABLE (1<<16) macro`
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A D	i915_reg.h	`853 #define ST1_ENABLE (1<<16) macro`

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