Searched refs:CMD_3D (Results 1 - 25 of 33) sorted by relevance

12

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h37 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
51 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
53 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
56 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
58 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
60 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
62 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
65 #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
90 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
106 #define _3DSTATE_ENABLES_1_CMD (CMD_3D|(
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H A Di915_reg.h37 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
53 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
66 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
84 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
122 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
126 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
129 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
132 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Dintel_reg.h30 #define CMD_3D (0x3 << 29) macro
53 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16))
56 #define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
188 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
201 #define _3DPRIMITIVE (CMD_3D | (0x1f << 24))
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_reg.h37 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
51 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
53 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
56 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
58 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
60 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
62 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16))
65 #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16))
90 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3)
106 #define _3DSTATE_ENABLES_1_CMD (CMD_3D|(
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H A Di915_reg.h37 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
53 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
66 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
84 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
122 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
126 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
129 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
132 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Dintel_reg.h30 #define CMD_3D (0x3 << 29) macro
53 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16))
56 #define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
188 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
201 #define _3DPRIMITIVE (CMD_3D | (0x1f << 24))
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.h31 #define CMD_3D (0x3<<29) macro
33 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
48 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
62 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
74 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
76 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
79 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
81 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
83 #define _3DSTATE_DFLT_SPECULAR_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
85 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Dgen3_render.h31 #define CMD_3D (3 << 29) macro
35 #define PRIM3D (CMD_3D | (0x1f<<24))
53 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
66 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
83 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
94 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_reg.h108 #define CMD_3D (0x3<<29) macro
110 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
125 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
139 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
151 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
153 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
156 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
158 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
160 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
162 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Di915_reg.h33 #define CMD_3D (0x3<<29) macro
35 #define PRIM3D (CMD_3D | (0x1f<<24))
52 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
65 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
82 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
93 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h102 #define CMD_3D (0x3<<29) macro
104 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
119 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
133 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
145 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
147 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
150 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
152 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
154 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
156 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Di915_reg.h33 #define CMD_3D (0x3<<29) macro
35 #define PRIM3D (CMD_3D | (0x1f<<24))
52 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
65 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
82 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
93 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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H A Di915_xvmc.c105 sampler_state->dw0.type = CMD_3D;
165 pixel_shader_program->shader0.type = CMD_3D;
179 pixel_shader_program->shader1.type = CMD_3D;
211 pixel_shader_program->shader2.type = CMD_3D;
244 pixel_shader_program->shader3.type = CMD_3D;
312 pixel_shader_constants->dw0.type = CMD_3D;
401 buffer_info->dest_y.dw0.type = CMD_3D;
418 buffer_info->dest_u.dw0.type = CMD_3D;
436 buffer_info->dest_v.dw0.type = CMD_3D;
454 buffer_info->dest_buf.dw0.type = CMD_3D;
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.h31 #define CMD_3D (0x3<<29) macro
33 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
48 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
62 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
74 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
76 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
79 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
81 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
83 #define _3DSTATE_DFLT_SPECULAR_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
85 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Dgen3_render.h31 #define CMD_3D (3 << 29) macro
35 #define PRIM3D (CMD_3D | (0x1f<<24))
53 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
66 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
83 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
94 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_reg.h102 #define CMD_3D (0x3<<29) macro
104 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
119 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
133 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
145 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
147 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
150 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
152 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
154 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
156 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Di915_reg.h33 #define CMD_3D (0x3<<29) macro
35 #define PRIM3D (CMD_3D | (0x1f<<24))
52 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
65 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
82 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
93 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h102 #define CMD_3D (0x3<<29) macro
104 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
119 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
133 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
145 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
147 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
150 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
152 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
154 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
156 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Di915_reg.h33 #define CMD_3D (0x3<<29) macro
35 #define PRIM3D (CMD_3D | (0x1f<<24))
52 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
65 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
82 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
93 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
108 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
117 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
120 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
124 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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H A Di915_xvmc.c105 sampler_state->dw0.type = CMD_3D;
165 pixel_shader_program->shader0.type = CMD_3D;
179 pixel_shader_program->shader1.type = CMD_3D;
211 pixel_shader_program->shader2.type = CMD_3D;
244 pixel_shader_program->shader3.type = CMD_3D;
312 pixel_shader_constants->dw0.type = CMD_3D;
401 buffer_info->dest_y.dw0.type = CMD_3D;
418 buffer_info->dest_u.dw0.type = CMD_3D;
436 buffer_info->dest_v.dw0.type = CMD_3D;
454 buffer_info->dest_buf.dw0.type = CMD_3D;
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/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_reg.h34 #define CMD_3D (0x3<<29) macro
36 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
51 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
65 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
78 #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16))
80 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \
83 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
85 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16))
87 #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16))
89 #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (
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H A Di915_reg.h34 #define CMD_3D (0x3<<29) macro
36 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
52 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
65 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
83 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
96 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
112 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
121 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
126 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
130 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h35 #define CMD_3D (0x3<<29) macro
37 #define PRIM3D_INLINE (CMD_3D | (0x1f<<24))
53 #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24))
66 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24))
84 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24))
97 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
113 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
122 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
127 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24))
131 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
867 #define CMD_3D macro
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h33 #define CMD_3D (0x3 << 29) macro
35 #define PRIM3D_INLINE (CMD_3D | (0x1f << 24))
51 #define _3DSTATE_AA_CMD (CMD_3D | (0x06 << 24))
64 #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8 << 24))
81 #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9 << 24))
92 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d << 24) | (0x8e << 16) | 1)
107 #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d << 24) | (0x9c << 16) | 5)
116 #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d << 24) | (0x88 << 16))
119 #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16 << 24))
123 #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (
840 #define CMD_3D macro
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/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_xvmc.c158 sampler_state->dw0.type = CMD_3D;
212 pixel_shader_program->shader0.type = CMD_3D;
225 pixel_shader_program->shader1.type = CMD_3D;
253 pixel_shader_program->shader2.type = CMD_3D;
281 pixel_shader_program->shader3.type = CMD_3D;
333 pixel_shader_constants->dw0.type = CMD_3D;
361 load_state_immediate_1->dw0.type = CMD_3D;
395 load_indirect->dw0.type = CMD_3D;
463 buffer_info->dest_y.dw0.type = CMD_3D;
473 buffer_info->dest_u.dw0.type = CMD_3D;
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