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Searched refs:_3DSTATE_SCISSOR_ENABLE_CMD (Results 1 - 25 of 40) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A D	i915_3d.c	`98 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_3d.c	`108 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_reg.h	`549 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
H A D	i915_reg.h	`311 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A D	i915_3d.c	`98 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_3d.c	`108 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_reg.h	`543 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A D	i915_3d.c	`94 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_3d.c	`110 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \|`
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A D	i915_clear.c	`133 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT); 184 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i915_state.c	`926 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD \| ENABLE_SCISSOR_RECT; 928 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT;`
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A D	i915_clear.c	`134 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT); 185 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i915_state.c	`887 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD \| ENABLE_SCISSOR_RECT; 889 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT;`
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A D	i830_state.c	`825 (_3DSTATE_SCISSOR_ENABLE_CMD \| ENABLE_SCISSOR_RECT); 828 (_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT); 1077 i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD \|`
H A D	i915_state.c	`846 (_3DSTATE_SCISSOR_ENABLE_CMD \| ENABLE_SCISSOR_RECT); 849 (_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT); 985 (_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_reg.h	`431 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
H A D	i915_reg.h	`306 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A D	i830_state.c	`825 (_3DSTATE_SCISSOR_ENABLE_CMD \| ENABLE_SCISSOR_RECT); 828 (_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT); 1077 i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD \|`
H A D	i915_state.c	`846 (_3DSTATE_SCISSOR_ENABLE_CMD \| ENABLE_SCISSOR_RECT); 849 (_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT); 985 (_3DSTATE_SCISSOR_ENABLE_CMD \| DISABLE_SCISSOR_RECT);`
H A D	i830_reg.h	`431 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
H A D	i915_reg.h	`306 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A D	gen2_render.h	`471 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A D	i830_reg.h	`543 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
H A D	i915_reg.h	`311 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A D	gen2_render.h	`471 #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D\|(0x1c<<24)\|(0x10<<19)) macro`

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