Searched refs:GCC_GPU_GPLL0_DIV_CLK_SRC (Results 1 - 25 of 34) sorted by relevance

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/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h49 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
H A Dqcom,gcc-sc7280.h47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
H A Dqcom,gcc-sm6115.h84 #define GCC_GPU_GPLL0_DIV_CLK_SRC 74 macro
H A Dqcom,sm4450-gcc.h46 #define GCC_GPU_GPLL0_DIV_CLK_SRC 34 macro
H A Dqcom,sm6375-gcc.h111 #define GCC_GPU_GPLL0_DIV_CLK_SRC 98 macro
H A Dqcom,sm7150-gcc.h47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 33 macro
H A Dqcom,sm8550-gcc.h44 #define GCC_GPU_GPLL0_DIV_CLK_SRC 31 macro
H A Dqcom,gcc-sm8450.h58 #define GCC_GPU_GPLL0_DIV_CLK_SRC 44 macro
H A Dqcom,gcc-qcm2290.h97 #define GCC_GPU_GPLL0_DIV_CLK_SRC 85 macro
H A Dqcom,gcc-sm6125.h126 #define GCC_GPU_GPLL0_DIV_CLK_SRC 115 macro
H A Dqcom,gcc-sm8250.h47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
H A Dqcom,sa8775p-gcc.h74 #define GCC_GPU_GPLL0_DIV_CLK_SRC 61 macro
H A Dqcom,sm8650-gcc.h46 #define GCC_GPU_GPLL0_DIV_CLK_SRC 33 macro
H A Dqcom,gcc-sm8350.h54 #define GCC_GPU_GPLL0_DIV_CLK_SRC 40 macro
H A Dqcom,gcc-sc8180x.h49 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
H A Dqcom,gcc-sdm845.h44 #define GCC_GPU_GPLL0_DIV_CLK_SRC 32 macro
H A Dqcom,gcc-sm8150.h50 #define GCC_GPU_GPLL0_DIV_CLK_SRC 38 macro
H A Dqcom,gcc-sc8280xp.h88 #define GCC_GPU_GPLL0_DIV_CLK_SRC 75 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi433 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
H A Dsm6375.dtsi1510 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
H A Dqcm2290.dtsi1548 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
H A Dsm6115.dtsi1793 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
H A Dsc8180x.dtsi2371 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
H A Dsc7180.dtsi2301 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
H A Dsm8150.dtsi2350 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;

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