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History log of /src/sys/arch/arm/nvidia/tegra210_car.c
RevisionDateAuthorComments
 1.27  27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.26  30-Apr-2020  riastradh branches: 1.26.2;
rnd_attach_source calls the callback itself now.

No need for every driver to explicitly call it to prime the pool.

Eliminate now-unused <sys/rndpool.h>.
 1.25  13-Oct-2019  skrll Restore %# for PRIxBUSADDR
 1.24  13-Oct-2019  skrll Use PRIxBUSADDR
 1.23  14-Dec-2018  skrll Support SATA on TEGRA210

Thanks to jmcneill for help with this.
 1.22  12-Dec-2018  skrll Trailing whitespace
 1.21  26-Sep-2018  jmcneill Initialize CML1 clock
 1.20  26-Sep-2018  jmcneill Register clocks with clk_attach
 1.19  09-Sep-2018  aymeric Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.

This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).

ok jmcneill@ on port-arm
 1.18  16-Jul-2018  christos Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
 1.17  28-Sep-2017  jmcneill branches: 1.17.2; 1.17.4; 1.17.6;
use CLK_GATE_SIMPLE
 1.16  27-Sep-2017  jmcneill Tegra210 HDA support.
 1.15  27-Sep-2017  jmcneill add SOC_THERM and TSENSOR clocks
 1.14  26-Sep-2017  jmcneill More PCIe / XUSBPAD initialization goo for Tegra210.
 1.13  25-Sep-2017  jmcneill Add clocks used by pcie
 1.12  25-Sep-2017  jmcneill Disable debug again
 1.11  25-Sep-2017  jmcneill USB works on Tegra X1 now.
 1.10  24-Sep-2017  jmcneill More XUSB init. A USB3 memory stick seems to work now.
 1.9  23-Sep-2017  jmcneill Disable debug
 1.8  23-Sep-2017  jmcneill Add APBDMA clock
 1.7  23-Sep-2017  jmcneill More XUSB init stuff.
 1.6  22-Sep-2017  jmcneill add USB2_TRK and HSIC_TRK clocks
 1.5  22-Sep-2017  jmcneill Initialize PLLE
 1.4  21-Sep-2017  jmcneill Setup PLLU
 1.3  21-Sep-2017  jmcneill Fix div calculation and utmip init params
 1.2  19-Sep-2017  jmcneill Add some xusb clocks (not working yet)
 1.1  21-Jul-2017  jmcneill branches: 1.1.2;
Add support for NVIDIA Tegra X1.
 1.1.2.2  28-Aug-2017  skrll Sync with HEAD
 1.1.2.1  21-Jul-2017  skrll file tegra210_car.c was added on branch nick-nhusb on 2017-08-28 17:51:31 +0000
 1.17.6.2  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.17.6.1  10-Jun-2019  christos Sync with HEAD
 1.17.4.3  26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.17.4.2  30-Sep-2018  pgoyette Ssync with HEAD
 1.17.4.1  28-Jul-2018  pgoyette Sync with HEAD
 1.17.2.2  03-Dec-2017  jdolecek update from HEAD
 1.17.2.1  28-Sep-2017  jdolecek file tegra210_car.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.26.2.1  03-Apr-2021  thorpej Sync with HEAD.

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