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Searched refs:ENABLE_STENCIL_WRITE_MASK (Results 1 - 25 of 32) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A D	i915_3d.c	`87 ENABLE_STENCIL_WRITE_MASK \| STENCIL_WRITE_MASK(0xff) \|`
H A D	i830_3d.c	`167 ENABLE_STENCIL_WRITE_MASK \| STENCIL_WRITE_MASK(0xff));`
H A D	i830_reg.h	`520 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i915_reg.h	`456 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A D	i915_3d.c	`87 ENABLE_STENCIL_WRITE_MASK \| STENCIL_WRITE_MASK(0xff) \|`
H A D	i830_3d.c	`167 ENABLE_STENCIL_WRITE_MASK \| STENCIL_WRITE_MASK(0xff));`
H A D	i830_reg.h	`514 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i915_reg.h	`456 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A D	i915_3d.c	`88 ENABLE_STENCIL_WRITE_MASK \| STENCIL_WRITE_MASK(0xff) \|`
H A D	i830_3d.c	`178 ENABLE_STENCIL_WRITE_MASK \|`
H A D	i830_reg.h	`452 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A D	i830_reg.h	`399 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i915_reg.h	`344 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i830_state.c	`86 i830->state.Ctx[I830_CTXREG_STATE4] \|= (ENABLE_STENCIL_WRITE_MASK \| 1020 ENABLE_STENCIL_WRITE_MASK \|`
H A D	i915_state.c	`111 ENABLE_STENCIL_WRITE_MASK \| 948 ENABLE_STENCIL_WRITE_MASK \|`
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A D	i830_reg.h	`399 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i915_reg.h	`344 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i830_state.c	`86 i830->state.Ctx[I830_CTXREG_STATE4] \|= (ENABLE_STENCIL_WRITE_MASK \| 1020 ENABLE_STENCIL_WRITE_MASK \|`
H A D	i915_state.c	`111 ENABLE_STENCIL_WRITE_MASK \| 948 ENABLE_STENCIL_WRITE_MASK \|`
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A D	gen2_render.h	`443 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A D	i830_reg.h	`514 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i915_reg.h	`456 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A D	gen2_render.h	`443 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A D	i830_reg.h	`514 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`
H A D	i915_reg.h	`456 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro`

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