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Searched refs:_3DSTATE_MODES_4_CMD (Results 1 - 25 of 34) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A D	i915_3d.c	`85 OUT_BATCH(_3DSTATE_MODES_4_CMD \|`
H A D	i830_3d.c	`162 OUT_BATCH(_3DSTATE_MODES_4_CMD \|`
H A D	i830_reg.h	`496 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`447 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A D	i915_3d.c	`85 OUT_BATCH(_3DSTATE_MODES_4_CMD \|`
H A D	i830_3d.c	`162 OUT_BATCH(_3DSTATE_MODES_4_CMD \|`
H A D	i830_reg.h	`490 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`447 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A D	i915_3d.c	`86 OUT_BATCH(_3DSTATE_MODES_4_CMD \|`
H A D	i830_3d.c	`173 OUT_BATCH(_3DSTATE_MODES_4_CMD \|`
H A D	i830_reg.h	`428 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`465 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A D	i830_reg.h	`375 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`336 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A D	i830_reg.h	`375 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`336 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A D	i915_state.c	`140 cso_data->modes4 \|= (_3DSTATE_MODES_4_CMD \| 471 cso->stencil_modes4 \|= (_3DSTATE_MODES_4_CMD \|`
H A D	i915_reg.h	`457 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A D	i915_state.c	`182 (_3DSTATE_MODES_4_CMD \| ENABLE_LOGIC_OP_FUNC \| 395 return (_3DSTATE_MODES_4_CMD \| ENABLE_STENCIL_TEST_MASK \|`
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A D	gen2_render.h	`419 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A D	i830_reg.h	`490 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`447 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A D	gen2_render.h	`419 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A D	i830_reg.h	`490 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x16<<24)) macro`
H A D	i915_reg.h	`447 #define _3DSTATE_MODES_4_CMD (CMD_3D\|(0x0d<<24)) macro`

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