Searched refs:GCC_PCIE_0_PHY_BCR (Results 1 - 25 of 30) sorted by relevance

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/src/sys/external/gpl2/dts/dist/include/dt-bindings/reset/
H A Dqcom,gcc-apq8084.h93 #define GCC_PCIE_0_PHY_BCR 82 macro
/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dqcom,gcc-sm6350.h168 #define GCC_PCIE_0_PHY_BCR 7 macro
H A Dqcom,qdu1000-gcc.h153 #define GCC_PCIE_0_PHY_BCR 6 macro
H A Dqcom,gcc-sc7280.h212 #define GCC_PCIE_0_PHY_BCR 1 macro
H A Dqcom,sm4450-gcc.h172 #define GCC_PCIE_0_PHY_BCR 6 macro
H A Dqcom,sm8550-gcc.h192 #define GCC_PCIE_0_PHY_BCR 6 macro
H A Dqcom,gcc-sm8450.h208 #define GCC_PCIE_0_PHY_BCR 7 macro
H A Dqcom,gcc-qcs404.h168 #define GCC_PCIE_0_PHY_BCR 10 macro
H A Dqcom,gcc-sm8250.h221 #define GCC_PCIE_0_PHY_BCR 7 macro
H A Dqcom,sa8775p-gcc.h274 #define GCC_PCIE_0_PHY_BCR 10 macro
H A Dqcom,sm8650-gcc.h215 #define GCC_PCIE_0_PHY_BCR 6 macro
H A Dqcom,gcc-sm8350.h223 #define GCC_PCIE_0_PHY_BCR 7 macro
H A Dqcom,gcc-sc8180x.h260 #define GCC_PCIE_0_PHY_BCR 5 macro
H A Dqcom,gcc-msm8998.h284 #define GCC_PCIE_0_PHY_BCR 76 macro
H A Dqcom,gcc-sdm845.h231 #define GCC_PCIE_0_PHY_BCR 24 macro
H A Dqcom,gcc-sm8150.h220 #define GCC_PCIE_0_PHY_BCR 5 macro
H A Dqcom,gcc-msm8996.h322 #define GCC_PCIE_0_PHY_BCR 80 macro
H A Dqcom,gcc-sc8280xp.h408 #define GCC_PCIE_0_PHY_BCR 4 macro
H A Dqcom,x1e80100-gcc.h429 #define GCC_PCIE_0_PHY_BCR 6 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/
H A Dmsm8998.dtsi987 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
H A Dsc8180x.dtsi1810 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
H A Dsm8150.dtsi1937 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
H A Dmsm8996.dtsi706 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
H A Dsm8350.dtsi1608 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
H A Dsm8250.dtsi2236 resets = <&gcc GCC_PCIE_0_PHY_BCR>;

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