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History log of /src/sys/dev/pci/viaide.c
RevisionDateAuthorComments
 1.104  04-Oct-2025  thorpej Use device_getprop_bool() for "use-compat-native-irq".
 1.103  01-Jun-2025  andvar viaide(4): give a bit more context on why ISA bridge is used to identify VIA
IDE controllers. NFCI.
 1.102  01-Jun-2025  andvar viaide(4): explicitly enable channels for VT6410 add-in cards.

VT6410 and VT6415 have different reasons for "missing" enable bits.

VT6410 uses the standard 0x40 offset for channel enable bits, but some add-in
cards have both channels disabled by default. This requires explicitly
writing the enable bits; otherwise, devices will not be detected. The same
bug is present in Linux and OpenBSD, where the bits are also simulated.
It was reported in Linux but closed as no-fix due to an unidentified root cause.

VT6415 returns 0 at offsets 0x40-0x43 and likely uses a different location
for its single channel enable bit, or it may not expose it at all. Until
the correct offset is identified (if ever), the driver must simulate the
enable bits.
 1.101  31-May-2025  andvar viaide(4): use via_chip_map() to attach VT8261 SATA controller in RAID mode.

Similarly to VT8251 and CX700, VT8261 has two ports per channel, while
via_sata_chip_map supports only one drive per channel. This caused disks on
secondary ports (2, 4) to not be detected, which is addressed by this change.
 1.100  09-May-2025  andvar remove leading tab in the empty line. NFCI.
 1.99  20-Apr-2025  andvar viaide(4): use __func__ in via_setup_channel() ATADEBUG_PRINT message.
Fixes function name in debug message, otherwise NFCI.
 1.98  20-Apr-2025  andvar viaide(4): check if chip enable register returns 0 before emulating enable
bits.

At least some VT6410 controllers have register exposed. In fact, some
motherboards allow to control IDE channels (enable/disable them).
 1.97  20-Apr-2025  andvar viaide(4): Improve VT8251 integrated SATA controller support in IDE/RAID modes.

Use via_chip_map() to attach this controller in IDE and RAID modes, similarly
to VX800. This allows drives to be identified and attached successfully on all
four ports (two channels with master/slave ports).

Switch channel setup to sata_setup_channel(), replacing via_setup_channel().
This avoids writes to the 0x50 register, which is only relevant for IDE
controllers. Writes to SATA controller registers caused drives on the IDE
controller (0x0571) to fail to attach. Apply this fix also to VX900 and VT8261.

Rename VT8237R_SATA to VT8251_SATA (0x3349 is not used for VT8237R, AFAIK).
This PCI ID is used in RAID mode on newer (CE) chipset revision and in all
modes (IDE/RAID/AHCI) on older revision.
Add the 0x5287 PCI ID, used in IDE mode on newer (CE) chipset revision.
Rename VT8251_SATA to VT8251_AHCI (0x6287 is used only in AHCI mode).
Add VT8251_AHCI to the ahcisata(4) quirk list, same as VT8251_SATA.

For more details, see the tech-kern thread:
https://mail-index.netbsd.org/tech-kern/2025/04/13/msg030365.html

Should fix and close PR kern/37517.

Tested on Asus A8V-VM (CD) and MSI MS-7318 (CE) motherboards.

Reviewed by bad.
 1.96  05-Apr-2025  andvar viaide(4): Add RAID mode support for VIA VX900/VX11 SATA controllers.

The BIOS option to enable RAID is uncommon on systems using these chipsets;
however, at least two motherboards mention it in their manuals. The RAID
firmware does not provide management features, but it can recognize and boot
from preconfigured VIA RAID arrays.

Tested on ECS VX900-I.

Also add the VX11 chipset to the controller name, as it shares the same PCI ID.
 1.95  03-Apr-2025  andvar viaide(4): Add support for VIA VT6415/VT6330 single-channel IDE controllers.

Beyond adding the usual identification code, several adjustments were required:

1) Introduced 'single_channel` to set 'nchannels` to 1 for this controller.

2) Added 'APO_IDECONF_ALWAYS_EN` definition and the 'no_ideconf` flag to mimic
enabled channel bits, as this controller's enable chip register is unset.
Applied the same to VT6410, following OpenBSD and Linux, since some
controllers are known to not set this register as well.

3) Combined all VIA controllers identified by PCI ID (not ISA bus) using switch
fallthrough, as they currently share the same UDMA setting. Consequently,
the VX900 name printing was moved to the device description and adjusted
to better reflect the device.

4) Moved setting interface bits for RAID controllers under the RAID capability
check, enabling the above fallthrough and paving the way for support of other
RAID-capable controllers in upcoming changes.

5) The VT6330 is a combo FireWire/IDE controller. Added its FireWire controller
PCI ID to pcidevs.

Tested on ASRock P5B-DE.

Reviewed by jak and bad.

Addresses PR kern/45917
 1.94  16-Mar-2025  andvar viaide(4): add IDE controller identification by the VT8237S ISA bridge.

The controller's PATA interface uses PCI ID 0x0571, which is shared among
many VIA southbridges. The ISA bridge is used to identify capabilities,
including for the VT8237S.

Unknown PATA controllers disable UDMA by default. This change ensures PATA
drives attach at full speed.

Pullups to netbsd-9 and netbsd-10 are needed.
 1.93  11-Mar-2025  andvar viaide(4): check and add ATA RAID capability in via_sata_chip_map_new() used
by VT6241(A) RAID controller.

This is required for ataraid(4) to attach on this controller if RAID was
configured using its firwmare.

The conditions may be redundant for this controller, but it is uncertain what
variations exist in the wild.

Worth pulling up to netbsd-9, 10.
 1.92  03-Mar-2025  andvar viaide(4): use via_chip_map() instead of via_sata_chip_map_new() to attach
CX700/VX800 IDE/SATA RAID controllers and set interface flags the same way as
the VT6410_RAID case for native interrupts required by RAID mode.

Device descriptions were moved to pciide_via_products and updated to cascade
VT6410_RAID and CX700_IDE options.

via_sata_chip_map_new previously worked more by "accident," as it did not
return early on failure to map SATA registers and defaulted to the generic
drive probe function. However, it failed to attach PATA drives (endless
timeouts) and incorrectly detected "three" channels as VT6421, despite the
controller having only two.

Fixes PR kern/59010.

Pull-ups to netbsd-9, 10 are needed.

Reviewed and approved by jakllsch@.
 1.91  23-Jan-2025  andvar viaide(4): Add support for VIA VT8261 IDE/SATA integrated controller.

The VT8261 southbridge, paired with the VN1000 chipset, is obscure and hard to
find. Besides some evaluation boards surfacing after Centaur's demise, at least
one rare production motherboard is known to exist.

Despite its rarity, the VT8261 is very similar to the VT8251. It uses separate
PCI IDs for PATA and SATA (IDE/RAID modes) with 4 SATA ports in total, 2 ports
sharing one channel, and maps registers through BAR5. This similarity made
adding basic support relatively simple (sharing same issues too).

Tested briefly on VIA VT8591B eval board.
 1.90  17-Oct-2024  andvar Use the chipset name to describe the IDE controller in order to avoid confusion.
VT800->VX800 and VT855->VX855.
 1.89  02-Jun-2019  jdolecek branches: 1.89.2; 1.89.28; 1.89.34;
updated patch from Andrius - update the chip map for CX700 to use
via_sata_chip_map_new, this seems to eliminate the ghost non-existing viaide1

XXX guess should use via_sata_chip_map_new for PCI_PRODUCT_VIATECH_CX700M2_IDE
XXX too, but this needs test on real hw

remove again the entries for VX800 and VX855 from pciide_via_products[],
as that part is untested with real hw

update for PR kern/43309
 1.88  01-Jun-2019  jdolecek match VIA Technologies VX800, VX855, and VT8237S in RAID mode

patch provided and testing done by Andrius Varanavicius via PR kern/43309
 1.87  09-Dec-2018  jdolecek use pci_intr_establish_xname() everywhere
 1.86  20-Oct-2017  jdolecek branches: 1.86.2; 1.86.4;
move ata_queue_alloc(1) and ata_queue_free() calls to ata_channel_init()
and ata_channel_destroy() respectively, to make attachment code simpler,
and to make it easier to spot special queue manipulation like cmdide(4)

on topic of PR kern/52606
 1.85  07-Oct-2017  jdolecek Merge support for SATA NCQ (Native Command Queueing) from jdolecek-ncq branch

ATA subsystem was changed to support several outstanding commands, and use
NCQ xfers if supported by both the controller and the disk, including NCQ
error recovery. Set NCQ high priority for BPRIO_TIMECRITICAL xfers
if supported. Added FUA support.

Done some work towards MP-safe, all ATA code tsleep()/wakeup() replaced
by condvars, and switched most code from spl* to mutexes (separate
wd(4) and ata channel lock).

Introduced new option WD_CHAOS_MONKEY to facilitate testing of error
handling, fixed several uncovered issues. Also fixed several problems
with kernel dump to wd(4) disk.

Tested with ahcisata(4), mvsata(4), siisata(4), piixide(4) on amd64,
with and without port multiplier, both disk and ATAPI devices; other
drivers and archs mechanically adjusted and compile-tested. NCQ is
supported for ahcisata(4) and siisata(4) for any controller, for
mvsata(4) only Gen IIe ones for now. Also enabled ATAPI support in
mvsata(4).

Thanks to Matt Thomas for initial ATA infrastructure patch, and
Jonathan A.Kollasch for siisata(4) NCQ changes and general testing.

Also fixes PR kern/43169 (wd(4)); and PR kern/11811, PR kern/47041,
PR kern/51979 (kernel dump)
 1.84  29-Mar-2014  christos branches: 1.84.18;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.
 1.83  31-Jul-2012  bouyer branches: 1.83.2; 1.83.4;
Apply back changes that were reverted on Jul 24 and Jul 26 (general ata/wdc
cleanup and SATA PMP support), now that I'm back to fix the fallouts.
 1.82  26-Jul-2012  jakllsch Revert, with intention of restoring in a less invasive way, the SATA Port
Multiplier code.

ok christos@
 1.81  24-Jul-2012  jakllsch Revert dsl@'s changes of Sun, 15 Jul 2012 10:55:35 +0000 and
Sun, 15 Jul 2012 10:56:50 +0000, excepting the kernel version bump.
First step in reverting regressions to ata(4) subsystem during the addition of
port multiplier support.
 1.80  15-Jul-2012  dsl Some namespace protection (and add greppablity).
Prefix the DRIVE_ and DRIVET_ constants from atavar.h with ATA_.
Don't use an enum for drive_type - you don't know how big it will be.
Move driver_type to avoid implicit structure padding (esp on arm).
This change is purely lexical and mechanical.

Update to 6.99.9 - this wasn't done when the SATA PMP changes
were made - I'm sure they warranted a bump.
 1.79  02-Jul-2012  bouyer Add sata Port MultiPlier (PMP) support to the ata bus layer,
as described in
http://mail-index.netbsd.org/tech-kern/2012/06/23/msg013442.html
PMP support in integrated to the atabus layer.
struct ata_channel's ch_drive[] is not dynamically allocated, and ch_ndrive
(renamed to ch_ndrives) closely reflects the size of the ch_drive[] array.
Add helper functions atabus_alloc_drives() and atabus_free_drives()
to manage ch_drive[]/ch_ndrives.
Add wdc_maxdrives to struct wdc_softc so that bus front-end can specify
how much drive they really support (master/slave or single).
ata_reset_drive() callback gains a uint32_t *sigp argument which,
when not NULL, will contain the signature of the device being reset.
While there, some cosmetic changes:
- added a drive_type enum to ata_drive_datas, and stop encoding the
probed drive type in drive_flags (we were out of drive flags anyway).
- rename DRIVE_ATAPIST to DRIVE_ATAPIDSCW to better reflect what this
really is
- remove ata_channel->ata_drives, it's redundant with the pointer in
ata_drive_datas
- factor out the interpretation of SATA signatures in sata_interpet_sig()

propagate these changes to the ATA HBA drivers, and add support for PMP
to ahcisata(4) and siisata(4).

Thanks to:
- Protocase (http://www.protocase.com/) which provided a system
with lots of controllers, SATA PMP and drive slots
- Conservation Genomics Laboratory, Department of Biology, New Mexico State
University for hosting the above system
- Brook Milligan, who set up remote access and has been very responsive
when SATA cable move was needed
 1.78  18-Mar-2012  tsutsui Add UDMA support for VIA VX900 media system processor IDE controller.
PR/46166 from Hiroshi Tokuda.

This should be pulled up to netbsd-6, since ZOTAC ZBOX nano VD01
http://www.zotacusa.com/zbox-nano-vd01.html
exhibited at NetBSD booth in Open Source Conference 2012 Tokyo Spring
was favored by many people.
 1.77  28-Dec-2011  phx branches: 1.77.2;
Add VT6410 support, heavily based on a patch by Takahiro Kambe:
http://mail-index.netbsd.org/port-i386/2007/03/30/0000.html
The VT6410 is special, because it may exist without a VIA PCI-ISA bridge.
 1.76  10-Jul-2011  jakllsch branches: 1.76.2; 1.76.6;
Add complete support for all channels on VT6421A SATA/PATA controller to
viaide(4).
 1.75  17-May-2011  dyoung PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
 1.74  10-May-2011  dyoung Stop abuse of PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED. The flags
specifically tell a driver that bridges upstream forward PCI I/O (or
memory) transactions to the device." Only bus drivers have any business
modifying these.
 1.73  10-Apr-2011  jakllsch Fix regression introduced in 1.72.
(Attach arguments need to be copied before using the copy.)
 1.72  04-Apr-2011  dyoung Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
 1.71  06-Nov-2010  jakllsch branches: 1.71.2;
Enable detachment.

Tested on nForce 4 IDE (compatiblity mapped) and SATA (native mapped).
 1.70  05-Nov-2010  jakllsch Pave the way for detachment of pciide(4)-family ATA controllers.
 1.69  22-Mar-2010  dyoung Activate PCI memory-mapped I/O access in the PCI Control and Status
Register if the PCI BAR is the memory-mapped type. The driver used to
decide whether to activate memory-mapped access by testing the truth of
pci_attach_args.pa_memt; that isn't MI, and it doesn't make sense.
 1.68  24-Feb-2010  dyoung branches: 1.68.2;
A pointer typedef entails trading too much flexibility to declare const
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.
 1.67  08-Jan-2010  dyoung branches: 1.67.2;
Expand PMF_FN_* macros.
 1.66  23-Dec-2009  mrg enable mem space if it isn't already enabled. several bioses leave
this not enabled, and viaide kind of depends upon it.

fixes viaide(4) on several machines.

idea from PR 38011, but reworked a little.
 1.65  22-Dec-2009  tsutsui Don't forget to initialize data32iot and data32ioh in via_sata_chip_map_new().
This makes 32bit UDMA xfer work properly on VIA VT6421.
 1.64  21-Nov-2009  jakllsch Fix matching of CX700. Should address PR/39063.

Also,

Change bus_space_subregion() size for each SATA PHY register from 1 to 4,
as we do a bus_space_read_4() within these subregions.

Use PCI_MAPREG_START where appropriate.
 1.63  20-Nov-2009  jakllsch Switch VT8237R SATA to via_sata_chip_map_7(). via_sata_chip_map_7()
works fine and is consistent with the other VIA SATA controllers.

Tested on VT8237R+.

(Somewhat amazing that via_sata_chip_map_0() worked at all for the
second port.)
 1.62  18-Nov-2009  jakllsch Match VT8251 IDE controller and enable UDMA Mode 6 thereon.
Should fix PATA speed issue in PR/37517.
Due to lack of hardware, only compile tested at this point.
 1.61  19-Oct-2009  bouyer Remove closes 3 & 4 from my licence. Lots of thanks to Soren Jacobsen
for the booring work !
 1.60  26-Sep-2009  jmcneill Add PCI_PRODUCT_VIATECH_VT8237A_SATA_2 to list of product IDs.
 1.59  23-Aug-2009  jmcneill s/Advanced Micro Devices/AMD/ for device descriptions.
 1.58  21-Dec-2008  nonaka Add VT8237S Integrated SATA Controller support.
 1.57  06-Sep-2008  rmind branches: 1.57.2; 1.57.4; 1.57.10;
PR/39119: Jan Thorsson: Support for VIA CX700M2 IDE controller.
 1.56  17-Jun-2008  phx branches: 1.56.2;
Renamed via_pegasos_mapregs_native to via_mapregs_compat_native, after
discussion with simonb. There may be other architectures who want to use
this function.
 1.55  15-Jun-2008  phx Fixed system lockup in native mode with compat irq 14/15, which can be selected
with the use-compat-native-irq property. It was caused by handling irqs from
both channels at once with the wrong interrupt handler routine
(pciide_pci_intr). Now pciide_compat_intr is installed for each channel.
Also renamed the function to via_pegasos_mapregs_native(), which seems more
appropriate.
 1.54  14-May-2008  dholland branches: 1.54.2;
fix typo in error message
 1.53  18-Mar-2008  cube branches: 1.53.2; 1.53.4; 1.53.6;
Split device_t and softc for ATA devices, as well as wd(4). Other
cosmetic changes where appropriate.
 1.52  29-Feb-2008  dyoung Use PMF_FN_ARGS, PMF_FN_PROTO.
 1.51  18-Jan-2008  joerg branches: 1.51.2; 1.51.6;
Add power management support. Untested due to lack of feedback.
 1.50  20-Dec-2007  phx VT8231 IDE workaround for native mode with "compatibility" interrupts 14/15.
This time done right by calling pciide_machdep_compat_intr_establish() to
get a MD interrupt handler.
Verified that it compiles for XEN again.
 1.49  17-Dec-2007  phx xen did no longer build.
Temporarily reverted to 1.47. Will need some time to find a good solution.
 1.48  16-Dec-2007  phx At least under certain (mis)configurations (e.g. on the "Pegasos" board)
the VT8231-IDE's native mode only works with irq 14/15, and cannot be
programmed to use a single native PCI irq alone. So we install an interrupt
handler for each channel, as in compatibility mode.
This behaviour has to be activated by the "use-compat-native-irq" property,
otherwise the driver works as before.
 1.47  14-Nov-2007  xtraeme branches: 1.47.2; 1.47.6;
emo-style: forgot to update the switch for MCP7[13] IDE.
 1.46  14-Nov-2007  xtraeme Attach to the NVIDIA MCP7[37] IDE Controllers.
 1.45  04-Oct-2007  xtraeme branches: 1.45.2; 1.45.4;
AMD CS5536 Companion Device is able to work in Ultra DMA Mode 5,
patch from Andreas Wrede in PR kern/37059.
 1.44  31-Aug-2007  xtraeme branches: 1.44.2;
Use a different case for the CX700 IDE Controller to print the
attach message and when setting the UDMA mode.
 1.43  31-Aug-2007  xtraeme - Proper VIA CX700 IDE Controller support (missed in previous).
- Attach to the NVIDIA MCP67 IDE and SATA controllers.
 1.42  31-Aug-2007  xtraeme Attach to the VIA CX700 IDE Controller.
 1.41  27-Mar-2007  garbled branches: 1.41.4; 1.41.8; 1.41.10;
The VT8237A SATA Controller uses chip_map_7, not 0, tested and confirmed
working on my machine. Also when a via controller is set to RAID mode,
it sets the pci_subclass to raid. Notice this and set ATAC_CAP_RAID.
 1.40  10-Feb-2007  mlelstv branches: 1.40.2; 1.40.6; 1.40.8; 1.40.10;
Add support for VT8237A/VT82C586A PCI-ISA-Bridge
Fixes PR kern/35314
 1.39  09-Feb-2007  ad Merge newlock2 to head.
 1.38  21-Jan-2007  isaki Add support for CS5536.
Reviewed by tsutsui@ on port-i386.
 1.37  16-Nov-2006  christos branches: 1.37.2;
__unused removal on arguments; approved by core.
 1.36  12-Nov-2006  bouyer Properly detect if BAR5 is IO or MEM type; avoid a message about not being
able to map the BAR on boot (note that it's just cosmetic, the registers were
mapped anyway). Tested by paul at whooppee.com; thanks !
 1.35  27-Oct-2006  bouyer Add SATA native registers support for VIA SATA controllers, so that
drives are probed using the SATA way (from FreeBSD). While here add the
VT8237A SATA Controller to the tables, should fix PR kern/34927.

Thanks to the C�sar Catri�n Carre�o and paul (at) whooppee.com for
tests.
 1.34  12-Oct-2006  christos - sprinkle __unused on function decls.
- fix a couple of unused bugs
- no more -Wno-unused for i386
 1.33  03-Sep-2006  xtraeme branches: 1.33.2; 1.33.4;
Add support for nvidia MCP61/65 IDE/SATA Controllers.
 1.32  01-Aug-2006  xtraeme branches: 1.32.2;
Match nForce3 250 SATA2.
 1.31  17-Jun-2006  xtraeme s/SATA/Serial ATA/
 1.30  17-Jun-2006  xtraeme Enable support for NVIDIA MCP04 and MCP55 IDE/SATA Controllers, tested
by rillig with MCP55.
 1.29  30-Apr-2006  xtraeme branches: 1.29.2; 1.29.4;
PR port-amd64/33393: viaide driver patch for VT8237R SATA.
 1.28  31-Jan-2006  xtraeme branches: 1.28.2; 1.28.4; 1.28.6; 1.28.8; 1.28.10;
The NVidia nForce430 IDE Controller supports Ultra-DMA Mode 6, enable it.
Patch from MASUDA Hideo via tech-kern.
 1.27  02-Jan-2006  manu Add support for nForce430 ATA133 and SATA controllers. My disks now run
at a decent speed.
 1.26  11-Dec-2005  christos branches: 1.26.2;
merge ktrace-lwp.
 1.25  24-May-2005  lukem branches: 1.25.2;
add __KERNEL_RCSID
 1.24  27-Feb-2005  perry branches: 1.24.2;
nuke trailing whitespace
 1.23  02-Feb-2005  abs Reminder not to trust cheap no-name packaging. VIA product 0x3249 is
a VT642*1* not VT642. Also add to list in viaide manpage and note
that drives need to be configured into RAID/JOBS sets via its BIOS.
http://www.via.com.tw/en/products/peripherals/serial-ata_raid/vt6421/
 1.22  01-Feb-2005  abs Add 'VT642 SATA RAID Controller'. It looks like a viaide, it smells
like a viaide... but you can only address the drives once you have
put two or more of them into a RAID or JBOD.
 1.21  27-Jan-2005  kent support for nForce 4 PATA and SATA
 1.20  13-Jan-2005  jdolecek branches: 1.20.2; 1.20.4;
match NVIDIA nForce2 Ultra 400 IDE and Serial ATA controller; only the IDE
controller actually tested
 1.19  06-Nov-2004  xtraeme Add support for:

NVIDIA nForce3 250 IDE Controller
NVIDIA nForce3 250 Serial ATA Controller

From Kouichirou Hiratsuka in PR 27843, ok'ed christos@
 1.18  21-Aug-2004  thorpej atastart() (called only at splbio(), and from interrupts) can change
drive_flags, to make sure all drive_flags manipulations are done at
splbio().
 1.17  20-Aug-2004  thorpej Move most of wdc_softc into a new atac_softc structure that contains
info common to all types of ATA controllers.
 1.16  19-Aug-2004  thorpej - Add and use a CHAN_TO_WDC() macro to get the wdc_softc from an
ata_channel.
- Add and use a CHAN_TO_WDC_REGS() macro to get the wdc_regs from an
ata_channel.
- Add and use a CHAN_TO_PCIIDE() macro to get the pciide_softc from an
ata_channel.
- Add and use a CHAN_TO_PCHAN() macro to get the pciide_channel from an
ata_channel. (This one just hides a cast, and is really just for
consistency with the others.)
 1.15  14-Aug-2004  thorpej - Split the register handles out of struct wdc_channel into a separate
wdc_regs structure, and array of which (indexed per channel) is pointed
to by struct wdc_softc.
- Move the resulting wdc_channel structure to atavar.h and rename it to
ata_channel. Rename the corresponding flags.
- Add a "ch_ndrive" member to struct ata_channel, which indicates the
maximum number of drives that can be present on the channel. For now,
this is always 2. Add an ATA_MAXDRIVES constant that places an upper
limit on this value, also currently 2.
 1.14  13-Aug-2004  thorpej WDCDEBUG -> ATADEBUG.
 1.13  13-Aug-2004  thorpej Don't bother with bits that tell of the presence of optional callbacks;
just check the function pointers for NULL.
 1.12  22-Jul-2004  drochner branches: 1.12.2;
Replace the hooribly overloaded use of pci_enumerate_bus() - to find out
the chipset revision - by pci_find_device().
While the latter isn't better technically (works around the otherwise
hierarchical device tree), using it doesn't require PCI configuration
functions to support stuff which philosophically doesn't belong there.
So we get the hands free to restructure things for better loadable
driver support.
(Actually, since this is about chipset internal IDE interfaces where
the PCI device/function numbers are well known, this all is unnecessary.)
 1.11  10-Mar-2004  bouyer branches: 1.11.4;
Enable ATA-133 for AMD8111. From Nicolas Joly in kern/24729.
pciide_apollo_reg.h already contains the Ultra133 timming values for amd.
 1.10  20-Feb-2004  fvdl Actually match the nforce3 as well..
 1.9  03-Jan-2004  thorpej More wdc_channel structure member namespace cleanup:
- channel -> ch_channel
- wdc -> ch_wdc
 1.8  03-Jan-2004  thorpej Rename "struct channel_softc" to "struct wdc_channel".
 1.7  27-Nov-2003  fvdl There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.

To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.

bus_space_write_4(tag, handle, offset, value)

becomes

bus_space_write_4(tag, handles[offset], 0, value)

Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
 1.6  24-Oct-2003  mycroft Remove IDE_PCI_CLASS_OVERRIDE -- it wasn't actually used anywhere. In lieu of
it, add a class/subclass check to drivers that do not (appear) to have a unique
ID for the IDE controller. This includes aceride, cypide and optiide.
 1.5  23-Oct-2003  fvdl * match the nForce3 controller
* search the whole current PCI bus for the VIA bridge, can't rely on
it to be function 0 of the same device
 1.4  18-Oct-2003  enami Factor out common code.
 1.3  18-Oct-2003  enami Whitespace nits.
 1.2  11-Oct-2003  thorpej Cosmetic changes:
- Use static to unexport symbols that don't need to be exported.
- ANSI'ify.
- Some whitespace nits.
 1.1  08-Oct-2003  bouyer Split pciide in per-chip family driver, as proposed in
http://mail-index.netbsd.org/tech-kern/2003/09/25/0007.html
We now have:
acardide* at pci? dev ? function ? # Acard IDE controllers
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
cmdide* at pci? dev ? function ? # CMD tech IDE controllers
cypide* at pci? dev ? function ? # Cypress IDE controllers
hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
optiide* at pci? dev ? function ? # Opti IDE controllers
piixide* at pci? dev ? function ? # Intel IDE controllers
pdcide* at pci? dev ? function ? # Promise IDE controllers
siside* at pci? dev ? function ? # SiS IDE controllers
slide* at pci? dev ? function ? # Symphony Labs IDE controllers
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver

serverworks driver not commited yet; there are still copyright issues about
it.
 1.11.4.2  05-May-2005  riz Pull up revision 1.22-1.23 (requested by abs in ticket #1153):
Add 'VT642 SATA RAID Controller'. It looks like a viaide, it smells
like a viaide... but you can only address the drives once you have
put two or more of them into a RAID or JBOD.
 1.11.4.1  07-Apr-2005  tron Pull up revision 1.19 via patch (requested by hira in ticket #1103):
Add support for:
NVIDIA nForce3 250 IDE Controller
NVIDIA nForce3 250 Serial ATA Controller
From Kouichirou Hiratsuka in PR 27843, ok'ed christos@
 1.12.2.10  10-Nov-2005  skrll Sync with HEAD. Here we go again...
 1.12.2.9  04-Mar-2005  skrll Sync with HEAD.

Hi Perry!
 1.12.2.8  04-Feb-2005  skrll Sync with HEAD.
 1.12.2.7  17-Jan-2005  skrll Sync with HEAD.
 1.12.2.6  14-Nov-2004  skrll Sync with HEAD.
 1.12.2.5  21-Sep-2004  skrll Fix the sync with head I botched.
 1.12.2.4  18-Sep-2004  skrll Sync with HEAD.
 1.12.2.3  25-Aug-2004  skrll Sync with HEAD.
 1.12.2.2  03-Aug-2004  skrll Sync with HEAD
 1.12.2.1  22-Jul-2004  skrll file viaide.c was added on branch ktrace-lwp on 2004-08-03 10:49:12 +0000
 1.20.4.2  19-Mar-2005  yamt sync with head. xen and whitespace. xen part is not finished.
 1.20.4.1  12-Feb-2005  yamt sync with head.
 1.20.2.1  29-Apr-2005  kent sync with -current
 1.24.2.4  03-Aug-2006  tron Pull up following revision(s) (requested by xtraeme in ticket #1446):
sys/dev/pci/viaide.c: revision 1.32
Match nForce3 250 SATA2.
 1.24.2.3  30-Apr-2006  riz Pull up following revision(s) (requested by xtraeme in ticket #1295):
sys/dev/pci/pcidevs: revision 1.785
sys/dev/pci/viaide.c: revision 1.29
PR port-amd64/33393: viaide driver patch for VT8237R SATA.
 1.24.2.2  01-Feb-2006  tron Pull up following revision(s) (requested by xtraeme in ticket #1149):
sys/dev/pci/viaide.c: revision 1.28
The NVidia nForce430 IDE Controller supports Ultra-DMA Mode 6, enable
it. Patch from MASUDA Hideo via tech-kern.
 1.24.2.1  05-Jan-2006  riz Pull up following revision(s) (requested by manu in ticket #1086):
sys/dev/pci/pcidevs: revision 1.755
sys/dev/pci/viaide.c: revision 1.27
Add support for nForce430 ATA133 and SATA controllers. My disks now run
at a decent speed.
 1.25.2.9  24-Mar-2008  yamt sync with head.
 1.25.2.8  17-Mar-2008  yamt sync with head.
 1.25.2.7  21-Jan-2008  yamt sync with head
 1.25.2.6  15-Nov-2007  yamt sync with head.
 1.25.2.5  27-Oct-2007  yamt sync with head.
 1.25.2.4  03-Sep-2007  yamt sync with head.
 1.25.2.3  26-Feb-2007  yamt sync with head.
 1.25.2.2  30-Dec-2006  yamt sync with head.
 1.25.2.1  21-Jun-2006  yamt sync with head.
 1.26.2.2  01-Feb-2006  yamt sync with head.
 1.26.2.1  15-Jan-2006  yamt sync with head.
 1.28.10.1  24-May-2006  tron Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
 1.28.8.1  11-May-2006  elad sync with head
 1.28.6.4  03-Sep-2006  yamt sync with head.
 1.28.6.3  11-Aug-2006  yamt sync with head
 1.28.6.2  26-Jun-2006  yamt sync with head.
 1.28.6.1  24-May-2006  yamt sync with head.
 1.28.4.1  01-Jun-2006  kardel Sync with head.
 1.28.2.1  09-Sep-2006  rpaulo sync with head
 1.29.4.1  13-Jul-2006  gdamore Merge from HEAD.
 1.29.2.1  19-Jun-2006  chap Sync with head.
 1.32.2.1  07-Sep-2006  riz Pull up following revision(s) (requested by xtraeme in ticket #113):
sys/dev/pci/viaide.c: revision 1.33
share/man/man4/viaide.4: revision 1.7
sys/dev/pci/pcidevs: revision 1.825
sys/dev/pci/pcidevs: revision 1.826
- Add all pciids for nvidia MCP61/65 controllers, from obsd.
- Improve description in all them.
Erm forgot to add MCP61/65 SATA Controllers and sort them.
Add support for nvidia MCP61/65 IDE/SATA Controllers.
Mention MCP61/65... and bump date.
 1.33.4.2  10-Dec-2006  yamt sync with head.
 1.33.4.1  22-Oct-2006  yamt sync with head
 1.33.2.3  06-Feb-2007  ad Quiten noisy boot messages.
 1.33.2.2  01-Feb-2007  ad Sync with head.
 1.33.2.1  18-Nov-2006  ad Sync with head.
 1.37.2.4  11-Oct-2007  pavel Pull up following revision(s) (requested by xtraeme in ticket #922):
sys/dev/pci/viaide.c: revision 1.45
AMD CS5536 Companion Device is able to work in Ultra DMA Mode 5,
patch from Andreas Wrede in PR kern/37059.
 1.37.2.3  10-Jun-2007  bouyer Pull up following revision(s) (requested by hira in ticket #713):
sys/dev/pci/pcidevs: revision 1.863
sys/dev/pci/viaide.c: revision 1.38
share/man/man4/viaide.4: revision 1.8
Add PCI Ids for AMD Geode LX and CS5536.
Add support for CS5536 IDE.
 1.37.2.2  31-Mar-2007  bouyer branches: 1.37.2.2.2;
Pull up following revision(s) (requested by garbled in ticket #541):
sys/dev/pci/viaide.c: revision 1.41 via patch
The VT8237A SATA Controller uses chip_map_7, not 0, tested and confirmed
working on my machine. Also when a via controller is set to RAID mode,
it sets the pci_subclass to raid. Notice this and set ATAC_CAP_RAID.
 1.37.2.1  17-Feb-2007  tron Pull up following revision(s) (requested by mlelstv in ticket #449):
sys/dev/pci/pcidevs: revision 1.867
sys/dev/pci/viaide.c: revision 1.40
Add support for VT8237A/VT82C586A PCI-ISA-Bridge
Fixes PR kern/35314
 1.37.2.2.2.2  29-Oct-2007  wrstuden Catch up with 4.0 RC3
 1.37.2.2.2.1  03-Sep-2007  wrstuden Sync w/ NetBSD-4-RC_1
 1.40.10.1  29-Mar-2007  reinoud Pullup to -current
 1.40.8.1  11-Jul-2007  mjf Sync with head.
 1.40.6.2  09-Oct-2007  ad Sync with head.
 1.40.6.1  10-Apr-2007  ad Sync with head.
 1.40.2.1  15-Apr-2007  yamt sync with head.
 1.41.10.3  23-Mar-2008  matt sync with HEAD
 1.41.10.2  09-Jan-2008  matt sync with HEAD
 1.41.10.1  06-Nov-2007  matt sync with HEAD
 1.41.8.3  14-Nov-2007  joerg Sync with HEAD.
 1.41.8.2  04-Oct-2007  joerg Sync with HEAD.
 1.41.8.1  03-Sep-2007  jmcneill Sync with HEAD.
 1.41.4.1  03-Sep-2007  skrll Sync with HEAD.
 1.44.2.1  06-Oct-2007  yamt sync with head.
 1.45.4.3  18-Feb-2008  mjf Sync with HEAD.
 1.45.4.2  27-Dec-2007  mjf Sync with HEAD.
 1.45.4.1  19-Nov-2007  mjf Sync with HEAD.
 1.45.2.1  18-Nov-2007  bouyer Sync with HEAD
 1.47.6.2  19-Jan-2008  bouyer Sync with HEAD
 1.47.6.1  02-Jan-2008  bouyer Sync with HEAD
 1.47.2.1  26-Dec-2007  ad Sync with head.
 1.51.6.5  17-Jan-2009  mjf Sync with HEAD.
 1.51.6.4  28-Sep-2008  mjf Sync with HEAD.
 1.51.6.3  29-Jun-2008  mjf Sync with HEAD.
 1.51.6.2  02-Jun-2008  mjf Sync with HEAD.
 1.51.6.1  03-Apr-2008  mjf Sync with HEAD.
 1.51.2.1  24-Mar-2008  keiichi sync with head.
 1.53.6.2  18-Sep-2008  wrstuden Sync with wrstuden-revivesa-base-2.
 1.53.6.1  23-Jun-2008  wrstuden Sync w/ -current. 34 merge conflicts to follow.
 1.53.4.5  11-Aug-2010  yamt sync with head.
 1.53.4.4  11-Mar-2010  yamt sync with head
 1.53.4.3  16-Sep-2009  yamt sync with head
 1.53.4.2  04-May-2009  yamt sync with head.
 1.53.4.1  16-May-2008  yamt sync with head.
 1.53.2.2  17-Jun-2008  yamt sync with head.
 1.53.2.1  18-May-2008  yamt sync with head.
 1.54.2.1  18-Jun-2008  simonb Sync with head.
 1.56.2.1  19-Oct-2008  haad Sync with HEAD.
 1.57.10.1  21-Apr-2010  matt sync to netbsd-5
 1.57.4.4  20-Jan-2013  bouyer Apply patch, requested by msaitoh in ticket #1842:
sys/dev/pci/pcidevs 1.969 via patch
sys/dev/pci/viaide.c 1.58

Add VT8237S Integrated SATA Controller support.
PR#47452.
 1.57.4.3  09-Jan-2010  snj Pull up following revision(s) (requested by mrg in ticket #1227):
sys/dev/pci/viaide.c: revision 1.66
enable mem space if it isn't already enabled. several bioses leave
this not enabled, and viaide kind of depends upon it.
fixes viaide(4) on several machines.
idea from PR 38011, but reworked a little.
 1.57.4.2  09-Jan-2010  snj Pull up following revision(s) (requested by tsutsui in ticket #1210):
sys/dev/pci/viaide.c: revision 1.65
Don't forget to initialize data32iot and data32ioh in via_sata_chip_map_new().
This makes 32bit UDMA xfer work properly on VIA VT6421.
 1.57.4.1  26-Sep-2009  snj Pull up following revision(s) (requested by jmcneill in ticket #1021):
sys/dev/pci/viaide.c: revision 1.60
Add PCI_PRODUCT_VIATECH_VT8237A_SATA_2 to list of product IDs.
 1.57.2.1  19-Jan-2009  skrll Sync with HEAD.
 1.67.2.2  06-Nov-2010  uebayasi Sync with HEAD.
 1.67.2.1  30-Apr-2010  uebayasi Sync with HEAD.
 1.68.2.4  31-May-2011  rmind sync with head
 1.68.2.3  21-Apr-2011  rmind sync with head
 1.68.2.2  05-Mar-2011  rmind sync with head
 1.68.2.1  30-May-2010  rmind sync with head
 1.71.2.1  06-Jun-2011  jruoho Sync with HEAD.
 1.76.6.2  05-Apr-2012  mrg sync to latest -current.
 1.76.6.1  18-Feb-2012  mrg merge to -current.
 1.76.2.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.76.2.2  30-Oct-2012  yamt sync with head
 1.76.2.1  17-Apr-2012  yamt sync with head
 1.77.2.1  03-Apr-2012  riz Pull up following revision(s) (requested by tsutsui in ticket #151):
sys/dev/pci/viaide.c: revision 1.78
sys/dev/pci/pcidevs: revision 1.1106
Add VIA VX900 media system processor IDE controller.
PR/46166 from Hiroshi Tokuda.
Regen from pcidevs rev 1.1106:
Add VIA VX900 media system processor IDE controller.
PR/46166 from Hiroshi Tokuda.
Add UDMA support for VIA VX900 media system processor IDE controller.
PR/46166 from Hiroshi Tokuda.
This should be pulled up to netbsd-6, since ZOTAC ZBOX nano VD01
http://www.zotacusa.com/zbox-nano-vd01.html
exhibited at NetBSD booth in Open Source Conference 2012 Tokyo Spring
was favored by many people.
 1.83.4.1  18-May-2014  rmind sync with head
 1.83.2.3  03-Dec-2017  jdolecek update from HEAD
 1.83.2.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.83.2.1  09-Oct-2012  bouyer Support transfers of up to MACHINE_MAXPHYS in all pciide variants, and ahci.
wd(4) limits its maxphys depending on the drives's capability (64k sectors
for LBA48, 256 sectors for LBA and 128 sectors for older devices).

I assumed all pciide controllers could do MACHINE_MAXPHYS transfers, but
this may not be true. The capabilities of each controller variants should be
looked at more closely.
 1.84.18.2  27-Sep-2017  jdolecek change wdc_init_shadow_regs() to accept only struct wdc_regs, it doesn't
touch anything else

factor out the probe-only struct ata_channel initialization to wdcprobe(), to
reduce duplication of logic in individual drivers, and to actually work now
that more init is needed beyond the memset()
 1.84.18.1  10-Apr-2017  jdolecek ATA infrastructure improvements to eventually support more outstanding
commands

patch by Matt Thomas
 1.86.4.1  10-Jun-2019  christos Sync with HEAD
 1.86.2.1  26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.89.34.1  02-Aug-2025  perseant Sync with HEAD
 1.89.28.2  07-Jun-2025  martin Pull up following revision(s) (requested by andvar in ticket #1128):

sys/dev/pci/viaide.c: revision 1.101
sys/dev/pci/viaide.c: revision 1.102

viaide(4): use via_chip_map() to attach VT8261 SATA controller in RAID mode.

Similarly to VT8251 and CX700, VT8261 has two ports per channel, while
via_sata_chip_map supports only one drive per channel. This caused disks on
secondary ports (2, 4) to not be detected, which is addressed by this change.
viaide(4): explicitly enable channels for VT6410 add-in cards.

VT6410 and VT6415 have different reasons for "missing" enable bits.

VT6410 uses the standard 0x40 offset for channel enable bits, but some add-in
cards have both channels disabled by default. This requires explicitly
writing the enable bits; otherwise, devices will not be detected. The same
bug is present in Linux and OpenBSD, where the bits are also simulated.

It was reported in Linux but closed as no-fix due to an unidentified root cause.

VT6415 returns 0 at offsets 0x40-0x43 and likely uses a different location
for its single channel enable bit, or it may not expose it at all. Until
the correct offset is identified (if ever), the driver must simulate the
enable bits.
 1.89.28.1  09-May-2025  martin Pull up following revision(s) (requested by andvar in ticket #1101):

sys/dev/pci/viaide.c: revision 1.90
sys/dev/pci/ahcisata_pci.c: revision 1.72
sys/dev/pci/pciide_apollo_reg.h: revision 1.21
sys/dev/pci/viaide.c: revision 1.91
sys/dev/pci/viaide.c: revision 1.92
sys/dev/pci/viaide.c: revision 1.93
sys/dev/pci/viaide.c: revision 1.94
sys/dev/pci/viaide.c: revision 1.96
sys/dev/pci/viaide.c: revision 1.97
sys/dev/pci/viaide.c: revision 1.98
share/man/man4/viaide.4: revision 1.11
share/man/man4/viaide.4: revision 1.12

Use the chipset name to describe the IDE controller in order to avoid confusion.
VT800->VX800 and VT855->VX855.
Add VIA VT8261 southbridge SATA controller IDs and PCIB.
viaide(4): use via_chip_map() instead of via_sata_chip_map_new() to attach
CX700/VX800 IDE/SATA RAID controllers and set interface flags the same way as
the VT6410_RAID case for native interrupts required by RAID mode.
Device descriptions were moved to pciide_via_products and updated to cascade
VT6410_RAID and CX700_IDE options.
via_sata_chip_map_new previously worked more by "accident," as it did not
return early on failure to map SATA registers and defaulted to the generic
drive probe function. However, it failed to attach PATA drives (endless
timeouts) and incorrectly detected "three" channels as VT6421, despite the
controller having only two.
Fixes PR kern/59010.
Reviewed and approved by jakllsch@.

Update CX700_IDE and CX700M2_IDE descriptions to better reflect their actual
purpose.
These are not separate IDE controllers for CX700 and CX700M2 but rather the
IDE and RAID modes of the same controller in these chipsets (and few more).
viaide(4): check and add ATA RAID capability in via_sata_chip_map_new() used
by VT6241(A) RAID controller.
This is required for ataraid(4) to attach on this controller if RAID was
configured using its firwmare.
The conditions may be redundant for this controller, but it is uncertain what
variations exist in the wild.

viaide(4): add IDE controller identification by the VT8237S ISA bridge.
The controller's PATA interface uses PCI ID 0x0571, which is shared among
many VIA southbridges. The ISA bridge is used to identify capabilities,
including for the VT8237S.
Unknown PATA controllers disable UDMA by default. This change ensures PATA
drives attach at full speed.

viaide(4): Add support for VIA VT8261 IDE/SATA integrated controller.

The VT8261 southbridge, paired with the VN1000 chipset, is obscure and hard to
find. Besides some evaluation boards surfacing after Centaurs demise, at least
one rare production motherboard is known to exist.

Despite its rarity, the VT8261 is very similar to the VT8251. It uses separate
PCI IDs for PATA and SATA (IDE/RAID modes) with 4 SATA ports in total, 2 ports
sharing one channel, and maps registers through BAR5. This similarity made
adding basic support relatively simple (sharing same issues too).

Tested briefly on VIA VT8591B eval board.


viaide(4): Add RAID mode support for VIA VX900/VX11 SATA controllers.
The BIOS option to enable RAID is uncommon on systems using these chipsets;
however, at least two motherboards mention it in their manuals. The RAID
firmware does not provide management features, but it can recognize and boot
from preconfigured VIA RAID arrays.
Tested on ECS VX900-I.
Also add the VX11 chipset to the controller name, as it shares the same PCI ID.
viaide(4): Improve VT8251 integrated SATA controller support in IDE/RAID modes.
Use via_chip_map() to attach this controller in IDE and RAID modes, similarly
to VX800. This allows drives to be identified and attached successfully on all
four ports (two channels with master/slave ports).
Switch channel setup to sata_setup_channel(), replacing via_setup_channel().
This avoids writes to the 0x50 register, which is only relevant for IDE
controllers. Writes to SATA controller registers caused drives on the IDE
controller (0x0571) to fail to attach. Apply this fix also to VX900 and VT8261.
Rename VT8237R_SATA to VT8251_SATA (0x3349 is not used for VT8237R, AFAIK).
This PCI ID is used in RAID mode on newer (CE) chipset revision and in all
modes (IDE/RAID/AHCI) on older revision.
Add the 0x5287 PCI ID, used in IDE mode on newer (CE) chipset revision.
Rename VT8251_SATA to VT8251_AHCI (0x6287 is used only in AHCI mode).
Add VT8251_AHCI to the ahcisata(4) quirk list, same as VT8251_SATA.
For more details, see the tech-kern thread:
https://mail-index.netbsd.org/tech-kern/2025/04/13/msg030365.html
Should fix and close PR kern/37517.
Tested on Asus A8V-VM (CD) and MSI MS-7318 (CE) motherboards.
Reviewed by bad.
viaide(4): check if chip enable register returns 0 before emulating enable
bits.
At least some VT6410 controllers have register exposed. In fact, some
motherboards allow to control IDE channels (enable/disable them).
viaide(4): update the list of supported VIA controllers.
viaide(4): remove notes section about VT6421, it is not currently required to
setup RAID/JBOD sets to access drives.
 1.89.2.2  07-Jun-2025  martin Pull up following revision(s) (requested by andvar in ticket #1959):

sys/dev/pci/viaide.c: revision 1.101
sys/dev/pci/viaide.c: revision 1.102

viaide(4): use via_chip_map() to attach VT8261 SATA controller in RAID mode.

Similarly to VT8251 and CX700, VT8261 has two ports per channel, while
via_sata_chip_map supports only one drive per channel. This caused disks on
secondary ports (2, 4) to not be detected, which is addressed by this change.
viaide(4): explicitly enable channels for VT6410 add-in cards.

VT6410 and VT6415 have different reasons for "missing" enable bits.

VT6410 uses the standard 0x40 offset for channel enable bits, but some add-in
cards have both channels disabled by default. This requires explicitly
writing the enable bits; otherwise, devices will not be detected. The same
bug is present in Linux and OpenBSD, where the bits are also simulated.

It was reported in Linux but closed as no-fix due to an unidentified root cause.

VT6415 returns 0 at offsets 0x40-0x43 and likely uses a different location
for its single channel enable bit, or it may not expose it at all. Until
the correct offset is identified (if ever), the driver must simulate the
enable bits.
 1.89.2.1  09-May-2025  martin Pull up following revision(s) (requested by andvar in ticket #1944):

sys/dev/pci/viaide.c: revision 1.90
sys/dev/pci/ahcisata_pci.c: revision 1.72
sys/dev/pci/pciide_apollo_reg.h: revision 1.21
sys/dev/pci/viaide.c: revision 1.91
sys/dev/pci/viaide.c: revision 1.92
sys/dev/pci/viaide.c: revision 1.93
sys/dev/pci/viaide.c: revision 1.94
sys/dev/pci/viaide.c: revision 1.96
sys/dev/pci/viaide.c: revision 1.97
sys/dev/pci/viaide.c: revision 1.98
share/man/man4/viaide.4: revision 1.11
share/man/man4/viaide.4: revision 1.12

Use the chipset name to describe the IDE controller in order to avoid confusion.
VT800->VX800 and VT855->VX855.
Add VIA VT8261 southbridge SATA controller IDs and PCIB.
viaide(4): use via_chip_map() instead of via_sata_chip_map_new() to attach
CX700/VX800 IDE/SATA RAID controllers and set interface flags the same way as
the VT6410_RAID case for native interrupts required by RAID mode.
Device descriptions were moved to pciide_via_products and updated to cascade
VT6410_RAID and CX700_IDE options.
via_sata_chip_map_new previously worked more by "accident," as it did not
return early on failure to map SATA registers and defaulted to the generic
drive probe function. However, it failed to attach PATA drives (endless
timeouts) and incorrectly detected "three" channels as VT6421, despite the
controller having only two.
Fixes PR kern/59010.
Reviewed and approved by jakllsch@.

Update CX700_IDE and CX700M2_IDE descriptions to better reflect their actual
purpose.
These are not separate IDE controllers for CX700 and CX700M2 but rather the
IDE and RAID modes of the same controller in these chipsets (and few more).
viaide(4): check and add ATA RAID capability in via_sata_chip_map_new() used
by VT6241(A) RAID controller.
This is required for ataraid(4) to attach on this controller if RAID was
configured using its firwmare.
The conditions may be redundant for this controller, but it is uncertain what
variations exist in the wild.

viaide(4): add IDE controller identification by the VT8237S ISA bridge.
The controller's PATA interface uses PCI ID 0x0571, which is shared among
many VIA southbridges. The ISA bridge is used to identify capabilities,
including for the VT8237S.
Unknown PATA controllers disable UDMA by default. This change ensures PATA
drives attach at full speed.

viaide(4): Add support for VIA VT8261 IDE/SATA integrated controller.

The VT8261 southbridge, paired with the VN1000 chipset, is obscure and hard to
find. Besides some evaluation boards surfacing after Centaurs demise, at least
one rare production motherboard is known to exist.

Despite its rarity, the VT8261 is very similar to the VT8251. It uses separate
PCI IDs for PATA and SATA (IDE/RAID modes) with 4 SATA ports in total, 2 ports
sharing one channel, and maps registers through BAR5. This similarity made
adding basic support relatively simple (sharing same issues too).

Tested briefly on VIA VT8591B eval board.


viaide(4): Add RAID mode support for VIA VX900/VX11 SATA controllers.
The BIOS option to enable RAID is uncommon on systems using these chipsets;
however, at least two motherboards mention it in their manuals. The RAID
firmware does not provide management features, but it can recognize and boot
from preconfigured VIA RAID arrays.
Tested on ECS VX900-I.
Also add the VX11 chipset to the controller name, as it shares the same PCI ID.
viaide(4): Improve VT8251 integrated SATA controller support in IDE/RAID modes.
Use via_chip_map() to attach this controller in IDE and RAID modes, similarly
to VX800. This allows drives to be identified and attached successfully on all
four ports (two channels with master/slave ports).
Switch channel setup to sata_setup_channel(), replacing via_setup_channel().
This avoids writes to the 0x50 register, which is only relevant for IDE
controllers. Writes to SATA controller registers caused drives on the IDE
controller (0x0571) to fail to attach. Apply this fix also to VX900 and VT8261.
Rename VT8237R_SATA to VT8251_SATA (0x3349 is not used for VT8237R, AFAIK).
This PCI ID is used in RAID mode on newer (CE) chipset revision and in all
modes (IDE/RAID/AHCI) on older revision.
Add the 0x5287 PCI ID, used in IDE mode on newer (CE) chipset revision.
Rename VT8251_SATA to VT8251_AHCI (0x6287 is used only in AHCI mode).
Add VT8251_AHCI to the ahcisata(4) quirk list, same as VT8251_SATA.
For more details, see the tech-kern thread:
https://mail-index.netbsd.org/tech-kern/2025/04/13/msg030365.html
Should fix and close PR kern/37517.
Tested on Asus A8V-VM (CD) and MSI MS-7318 (CE) motherboards.
Reviewed by bad.
viaide(4): check if chip enable register returns 0 before emulating enable
bits.
At least some VT6410 controllers have register exposed. In fact, some
motherboards allow to control IDE channels (enable/disable them).
viaide(4): update the list of supported VIA controllers.
viaide(4): remove notes section about VT6421, it is not currently required to
setup RAID/JBOD sets to access drives.

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